Commit Graph

48971 Commits

Author SHA1 Message Date
Brian Paul
fdae0eaf22 st/mesa: copy num_immediates field when copying the immediates array
Two assignments to num_immediates were missing in
get_pixel_transfer_visitor() and get_bitmap_visitor().
The uninitialized value led to valgrind errors and crashes in some
cases.

Added new assertions to catch future problems in this area.  Also
changed num_immediates to unsigned to avoid signed/unsigned
comparison warnings.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-01-19 15:12:14 -07:00
Ian Romanick
f0ea46790f mesa: Set default access flags based on the run-time API
The default access flags for OpenGL ES (via GL_OES_map_buffer) and
desktop OpenGL are different.  The code previously tried to handle
this, but the decision was made at compile time.  Since the same
driver binary can be used for both OpenGL ES and desktop OpenGL, the
decision must be made at run-time.

This should fix bug #44433.  It appears that the test case does
various map and unmap operations and inspects the state of the buffer
object around each.  When it sees that GL_BUFFER_ACCESS does not match
its expectations, it fails.

NOTE: This is a candidate for release branches.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44433
2012-01-19 09:34:01 -08:00
Brian Paul
75f37ddba7 st/mesa: add fallback pipe formats for (compressed) R, RG formats
If we don't find an exact PIPE_FORMAT_x for a GL_(COMPRESSED)_RED/RG format,
try uncompressed formats.  We were already doing this for the RGB(A) formats.

Fixes piglit arb_texture_compression-internal-format-query test.

NOTE: This is a candidate for the stable branches.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-01-19 09:41:30 -07:00
Stéphane Marchesin
32b07bb149 i915g: Don't avoid flushing when we have a pending fence.
Otherwise the fence will never arrive.
Also check for a NULL i915->batch.

NOTE: This is a candidate for the 8.0 branch.
2012-01-18 19:25:41 -08:00
Stéphane Marchesin
2b4afdba05 i915g: Don't invert signalled/unsignalled fences
NOTE: This is a candidate for the 8.0 branch.
2012-01-18 19:25:41 -08:00
Kenneth Graunke
dcdfd1905c i965: Fix disassembly of data port writes on Ivybridge.
msg_type moved by a bit, so the message type was being disassembled
incorrectly.  In particular, render target writes were showing up as
"OWORD block write".

NOTE: This is a candidate for stable release branches.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-01-18 14:42:04 -08:00
Kenneth Graunke
a608be5d33 i965: Fix disassembly of sampler messages on Ivybridge.
Compared to sampler_gen5, simd_mode shifted by a bit and msg_type grew
by a bit.  So we were printing slightly incorrect numbers.

NOTE: This is a candidate for stable release branches.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-01-18 14:42:04 -08:00
Kenneth Graunke
2e712e41db i965/vs: Take attributes into account when deciding urb_entry_size.
Both the VF and VS share space in the URB.  First, the VF stores
attributes (shader inputs) there.  The VS then reads the attributes,
executes, and reuses the space to store varyings (shader outputs).

Thus, we need to calculate the amount of URB space necessary for inputs,
outputs, and pick whichever is greater.

The old VS backend correctly did this (brw_vs_emit.c:408), but the new
VS backend only considered outputs.

Fixes vertex scrambling in GLBenchmark PRO on Ivybridge.

NOTE: This is a candidate for the 8.0 branch.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41318
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-01-18 14:42:04 -08:00
Stéphane Marchesin
81da773f84 st/dri: Remove useless flush front.
In the following scenario:
- CreateContext C1
- MakeCurrent C1
- DestroyContext C1 (does not actually destroy the first context, postponed
 until the next MakeCurrent)
 - CreateContext C2
 - MakeCurrent C2
MakeCurrent will call flush on a half destroyed context, leading to crashes.
Since the other paths (destroy and makecurrent) already flush the context,
there is no need to flush here, so we remove this useless flush front call.

This fixes GPU crashes with Chrome and gallium drivers.
2012-01-18 13:22:27 -08:00
Ian Romanick
8a47242755 intel: Set depth to 6 for cubemaps
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41216
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43212
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43250
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Jin Yang <jin.a.yang@intel.com>
2012-01-18 12:48:37 -08:00
Kristian Høgsberg
221c678329 gbm: Validate usage flags in gbm_bo_create_from_egl_image()
The entry point is supposed to validate that the EGLImage is suitable for
the passed in usage flags, but that was never implemented.
2012-01-18 15:32:51 -05:00
Eric Anholt
2f868f1ddd i965: Add support for Z16 depth formats.
v2: Don't flag the format as being HiZ ready (there's DRI2 handshake
    pain to go through).

Fixes piglit gl-3.0-required-sized-texture-formats

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-18 10:25:36 -08:00
Eric Anholt
f0d5c92a4c i965/gen7: Set up surface horizontal alignment field.
This is required for Z16 support for texturing, which is the first
thing to have a horizontal alignment of 8.  Renderbuffers don't need
it, since they're always set up as the only mip level, but do it for
completeness anyway.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-18 10:25:36 -08:00
Eric Anholt
fc767ff590 i965/gen7: Remove stale comment.
This field is actually set up above.

NOTE: This is a candidate for the 8.0 branch, to avoid conflicts.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-18 10:25:21 -08:00
Eric Anholt
aad3a46ff4 glsl: Fix leak of linked uniform names at relink/free of the shader_program.
NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:12 -08:00
Eric Anholt
5a0f395bcf glsl: Fix leak of LinkedTransformFeedback.Varyings.
I copy-and-pasted the thing I was allocating for as the context, so
the first time it would be NULL (root of a ralloc context) and they'd
chain off each other from then on.

NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:12 -08:00
Eric Anholt
0f68d88034 mesa: Fix leak of uniform storage records on shader program link/free.
NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:12 -08:00
Eric Anholt
cbd464a117 i965: Fix leak of the program cache BO on context destroy.
NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:12 -08:00
Eric Anholt
7f278e15ad i965/vs: Fix leak of an empty hash_table structure per compile.
This statement got duplicated above, probably in a rebase resolution,
so we never freed the extra one.

NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:12 -08:00
Eric Anholt
b2be486962 i965: Fix refcount leak of the gl_program structure.
Fixes a leak of almost 200kb on a minimal shader_runner program
(algebraic-add-add-1).

NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:12 -08:00
Eric Anholt
b972744c78 mesa: Make the register allocator allocation take a ralloc context.
This fixes a memory leak on i965 context destruction.

NOTE: This is a candidate for the 8.0 branch.
2012-01-18 09:59:11 -08:00
Brian Paul
a9eda41539 svga: change PIPE_CAPF_MAX_TEXTURE_LOD_BIAS from 16.0 to 15.0
The legal range for the device is apparently [-16.0, +15.0].
Limiting the range to [-15, +15] fixes piglit's lodbias test.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-01-18 10:44:05 -07:00
Brian Paul
fd890873b2 svga: fix min/max lod clamping
The interaction between the mipmap lod min/max limits and the texture
base/max level limits is kind of tricky.  Changing the base level
didn't work as expected before.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-01-18 10:44:05 -07:00
Brian Paul
5abcd198b8 svga: add 0.5 in float->int conversion of sample min/max lod
This makes lod clamping more consistent with other drivers.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-01-18 10:44:05 -07:00
Brian Paul
84c7c14697 st/mesa: pass GL_MAP_INVALIDATE_RANGE_BIT to gallium drivers
when mapping renderbuffers or texture images.

NOTE: This is a candidate for the 8.0 branch.
2012-01-18 10:44:05 -07:00
Brian Paul
64fdfefb9d mesa: use GL_MAP_INVALIDATE_RANGE_BIT in glTexImage paths
Update the dd.h docs to indicate that GL_MAP_INVALIDATE_RANGE_BIT
can be used with GL_MAP_WRITE_BIT when mapping renderbuffers and
texture images.

Pass the flag when mapping texture images for glTexImage, glTexSubImage,
etc.  It's up to drivers whether to actually make use of the flag.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-01-18 10:44:05 -07:00
Brian Paul
1d7048f12e mesa: try RGBA_FLOAT16 before RGBA_FLOAT32 when choosing A,L,LA,I formats
To try to use less tex memory and maybe get better performance.
Spotted by Roland Scheidegger.

NOTE: This is a candidate for the 8.0 and 7.11 branches.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-01-18 10:44:05 -07:00
Brian Paul
7628696004 mesa: fix tex format selection for GL_R32F and other R/G float formats
The i965 driver advertises GL_ARB_texture_float and GL_ARB_texture_rg
support but the ctx->TextureFormatSupported[] table entries for
MESA_FORMAT_R_FLOAT32 and MESA_FORMAT_RGBA_FLOAT32 are false on gen 4
hardware.  So the case for GL_R32F would fail and we'd print an
implementation error.

This patch adds more Mesa tex format options for GL_R32F and other R/G
formats so we fall back to 16-bit formats when 32-bit formats aren't
available.

Eric made the same fix in commit 6216a5b4 for the non R/G formats.

v2: try 16-bit formats before 32-bit formats and try RG formats before
RGBA where possible.

This should fix https://bugs.freedesktop.org/show_bug.cgi?id=44039

NOTE: This is a candidate for the 8.0 and 7.11 branches.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2012-01-18 10:44:05 -07:00
Brian Paul
481011ffcd docs: add more potential dependencies for vmware guest driver 2012-01-18 10:44:05 -07:00
Alexander von Gluck IV
5481b5adcf scons: Add more machine architectures to the machine map
* BePC, BeBox, BeMac for Haiku.
* Add sparc architecture as Mesa looks for it.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
2012-01-18 16:46:16 +00:00
Dave Airlie
0196433ce5 r600g: fix ISLT on r600/700
This fixes ISLT like evergreen.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-18 22:14:49 +10:00
Dave Airlie
5893e686b6 r600g: make r600/700 use correct ineg.
Noticed by Vadim Girlin on irc.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-18 21:54:07 +10:00
Dave Airlie
1fc001ea15 r600g: fix some of the interpolation tests.
This enables linear gradients if we need a linear,
it also sets the flat shade flag for color/constant interpolations.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-18 20:13:16 +10:00
Kenneth Graunke
5acc7f38d4 i965: Bump Ivybridge's fake MRF range to g112-127 instead of g111-126.
When I originally implemented the hack to use GRFs 111+ as fake MRFs, I
did so purely to avoid rewriting all the code that dealt with MRFs.
However, it turns out that a similar hack is actually required.

Newly discovered language in the BSpec indicates that SEND instructions
with EOT set "should" use g112-g127 as their source registers.  Based on
assertions in the simulator, this is actually a requirement on certain
platforms.

Since we're faking MRFs already, we may as well use the officially
sanctioned range.  My guess is that we avoided this issue because we
seldom use m0: URB writes in the new VS backend start at m1, and RT
writes in the new FS backend start at m2.

NOTE: This is a candidate for stable release branches.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-01-18 00:45:01 -08:00
Kenneth Graunke
bdedd03b70 i965: Remove the INTEL_OLD_VS option.
Now that we no longer generate Mesa IR from GLSL IR, it's impossible to
use the old vertex shader backend for GLSL programs.  There's simply no
Mesa IR to codegen from.

Any attempt to do so would result in immediate GPU hangs, presumably due
to the driver uploading an empty program with no EOT message.

NOTE: This is a candidate for the 8.0 branch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-01-18 00:45:00 -08:00
Kenneth Graunke
d56ad273c0 mesa: Support GL_VERTEX_ATTRIB_ARRAY_INTEGER in GL 3.0 contexts.
According to Table 6.8 (Page 348) in the OpenGL 3.0 specification,
glGetVertexAttribiv supports GL_VERTEX_ATTRIB_ARRAY_INTEGER.

NOTE: This is a candidate for the 8.0 branch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-01-18 00:45:00 -08:00
Vadim Girlin
b69728cba5 r600g: fix UINT_TO_FLT on evergreen
It should be processed as trans-only.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-18 08:03:41 +00:00
Chad Versace
a6dd4bf5fc i965/gen5: Fix rendering of depth buffers without stencil [v2]
Fixes the following OGLConform tests on gen5:
    depth-stencil(misc.state_on.depth_int)
    fbo_db_ARBfp(basic.OnlyDepthBuffDrawBufferRender)

The problem was that, if the depth buffer's Mesa format was X8_Z24, then
we emitted the hardware format D24_UNORM_X8. But, on gen5, D24_UNORM_S8
must be emitted.

This bug was introduced by:
    commit d84a180417
    Author: Eric Anholt <eric@anholt.net>
    i965: Base HW depth format setup based on MESA_FORMAT, not bpp.

v2: Deref 'intel' directly. Move the branch for newer chipset to top.
    Quote the PRM. As requested by Ken.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43408
Note: This is a candidate for the 8.0 branch.
Reported-by: Xunx Fang <xunx.fang@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-17 17:26:45 -08:00
Anuj Phogat
ce1c949b16 intel: Return if pointer to intel_context is null
It is better to test if(intel == NULL) and simply return in that case.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-17 16:58:38 -08:00
Alex Deucher
46ce25722b r600g: add workaround for original R600 PS setup
The original R600 requires the UNCACHED_FIRST_INST bit
to be set in the PS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Note: this is candidate for the stable branches.
2012-01-17 18:46:46 -05:00
Paul Berry
c03ad08e8d i965: Add .gitignore file to exclude automake build artifacts from git.
With the conversion to automake in commit
e326480e4e, several additional build
artifacts are created:

  src/mesa/drivers/dri/i965/.deps/
  src/mesa/drivers/dri/i965/.libs/
  src/mesa/drivers/dri/i965/Makefile
  src/mesa/drivers/dri/i965/Makefile.in
  src/mesa/drivers/dri/i965/i965_dri.la
  src/mesa/drivers/dri/i965/i965_symbols_test

This patch adds all of these files to .gitignore.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-01-17 15:44:26 -08:00
Anuj Phogat
f1a9a9bcd1 mesa: Add condition in glGetTexImage for zero size textures
TestMipMaps() function in src/OGLconform/textureNPOT.c calls glTexImage2D()
with width = 0. Texture with zero size skips miptree allocation due to a
condition in function _mesa_store_teximage3d(). While calling glGetTexImage()
it results in assertion failure in intel_map_texture_image() due to null mt
pointer.

This patch fixes the issue by detecting the zero size texture early in
glGetTexImage and glGetCompressedTexImage functions. In such a case function
simply returns doing nothing.
Verified that below mentioned bug is fixed by this patch.

https://bugs.freedesktop.org/show_bug.cgi?id=42334

NOTE: This is a candidate for stable branches

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2012-01-17 15:14:44 -08:00
Alex Deucher
94556f3594 radeon: share common fog code between radeon and r200
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-01-17 18:09:25 -05:00
Alex Deucher
e77c495d09 radeon: fix fog coordinate emit
Noticed by dungeon on phoronix:
http://phoronix.com/forums/showthread.php?65408-Radeon-R100-R200-Mesa-Driver-Sees-Attention&p=247018#post247018

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Note: this is a candidate for the stable branches.
2012-01-17 18:03:28 -05:00
Alex Deucher
afdd6f8c34 r200: fix fog coordinate emit
Noticed by dungeon on phoronix:
http://phoronix.com/forums/showthread.php?65408-Radeon-R100-R200-Mesa-Driver-Sees-Attention&p=247018#post247018

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Note: this is a candidate for the stable branches.
2012-01-17 18:03:28 -05:00
Dave Airlie
ba59a1a0d8 r600g: fix recip_uint on r600.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-18 06:53:02 +10:00
Vadim Girlin
7383e754b7 r600g: fix USLT for r600-eg 2012-01-17 15:25:12 -05:00
Alexander von Gluck IV
183133271c scons: Don't set visibility to hidden on Haiku
The Haiku swrast driver is out of tree.
2012-01-17 20:02:41 +00:00
Alexander von Gluck IV
64ae209d50 scons: Add Haiku build support
Enables building stock Mesa under the Haiku operating system.
2012-01-17 20:01:14 +00:00
Vadim Girlin
4ba4853c0a r600g: rework IDIV/UDIV and implement MOD/UMOD (v2)
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-17 19:53:20 +00:00