Commit Graph

168914 Commits

Author SHA1 Message Date
Qiang Yu
c9d60547ef nir,radeonsi: add and implement nir_load_alpha_reference_amd
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21552>
2023-03-28 19:57:11 +00:00
Qiang Yu
67f295f1e2 aco: implement float16 nir_op_pack_(s|u)norm_2x16
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21552>
2023-03-28 19:57:11 +00:00
Qiang Yu
3df1c4455e ac/llvm: implement float16 nir_op_pack_(s|u)norm_2x16
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21552>
2023-03-28 19:57:11 +00:00
Qiang Yu
6848e05f9c nir: pack_(s|u)norm_2x16 support float16 as input
For AMD GPU which has instruction to normalize and pack two float16
inputs, and used when fragment shader export color output.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21552>
2023-03-28 19:57:11 +00:00
José Roberto de Souza
c30194e9ec intel: Allocate mesh shader URB space before task shader
A future platform requires that mesh shader URB space be allocated
before task shader URB space.

If task shader is enabled, it will align the mesh shader URB size to
8Kb and give the remaning back to task shader. Otherwise, no aligment
is needed, and mesh shader will have all the URB space.

BSpec: 56229, 56230
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21603>
2023-03-28 19:25:34 +00:00
Konstantin Seurer
b69ec8bde3 radv/rt: Refactor rq_load lowering
This just gets rid of all the bcsel emissions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21455>
2023-03-28 16:55:30 +00:00
Mike Blumenkrantz
83929f9955 aux/trace: fix GALLIUM_TRACE_NIR handling
this now correctly doesn't dump nir when the counter is zero

Fixes: f99eab23ad ("aux/trace: delete GALLIUM_TRACE_NIR log message")

Reviewed-by: Matti Hämäläinen <ccr@tnsp.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22164>
2023-03-28 16:17:39 +00:00
Mike Blumenkrantz
62789086e4 aux/trace: dump blend states with enums
this is more readable

Reviewed-by: Matti Hämäläinen <ccr@tnsp.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22164>
2023-03-28 16:17:39 +00:00
Pierre-Eric Pelloux-Prayer
c1050b5330 radv: add RADV_DEBUG=extra_md
This enables the use of UMD metadata v2. This allows tools (eg umr)
import buffers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21984>
2023-03-28 15:17:28 +00:00
Pierre-Eric Pelloux-Prayer
f315774727 radeonsi: don't use si_decompress_dcc if the blitter is running
Otherwise this will cause a blitter recursion which will crash at
some point.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21984>
2023-03-28 15:17:28 +00:00
Pierre-Eric Pelloux-Prayer
46d2655a18 radeonsi: add AMD_DEBUG=extra_md
When this debug flag is set, the driver sets the umd metadata for
all color textures and enables the use of extended metadata.

Extended metadata allows umr to import textures and setting these
on all color texture allows to import non-exported textures
(eg: dGPU draw surface when DRI_PRIME=1 is used).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21984>
2023-03-28 15:17:28 +00:00
Pierre-Eric Pelloux-Prayer
7f94b80001 ac/surface: introduce umd metadata v2
Update the metadata format. For gfx8- chips nothing change.

For gfx9 chips:
* for textures without a valid modifier a dw is added at index=10
  containing the stride
* for textures with a valid modifier the modifier is stored at
  index 10 and 11. Then the number of planes is stored at 12.
  Then for each plane the offset and the stride are stored.

The goal here is to be able to create textures from dmabuf from
umr - without these changes this is impossible because these
values can't be guessed.

The new layout is compatible with version=1 so old/new UMD can
be used together without issues and isn't used by default.
For radeonsi, it will be possible to use it with a AMD_DEBUG=...
option.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21984>
2023-03-28 15:17:28 +00:00
Pierre-Eric Pelloux-Prayer
4abb911bd2 amd/surface: rename metadata functions
Use more specific verbs to avoid confusion:
   set -> apply
   get -> compute

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21984>
2023-03-28 15:17:28 +00:00
Pierre-Eric Pelloux-Prayer
e272e59e40 mesa: fix CopyImageSubDataOES with GL_TEXTURE_EXTERNAL_OES
GL_TEXTURE_EXTERNAL_OES is allowed on GLES (any version) and glCopyImageSubDataOES
is implemented as an alias of CopyImageSubData.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21984>
2023-03-28 15:17:28 +00:00
Marcin Ślusarz
0c76e088f2 anv: call nir_shader_gather_info early
Shader info is needed for mesh in linking (in nir_lower_io_to_scalar_early,
see commit 5e144454) and will be needed once MR !17622 (anv: work around
for per-prim attributes corruption) lands.

We still need to call nir_shader_gather_info in anv_pipeline_lower_nir,
because the information got stale between anv_graphics_pipeline_load_nir
and anv_pipeline_lower_nir. Some examples:
- some FS inputs were marked as per-primitive during linking
  (brw_nir_link_shaders) affecting per_primitive_inputs mask
- some inputs and outputs were removed, because they are not used
  (nir_remove_unused_varyings) affecting outputs_written and inputs_read

This fixes func.mesh.ext.outputs.per_primitive.unused crucible test on DG2.
(I didn't know this test wasn't fixed by 5e144454, because I was testing
with !17622 merged-in, which added its own nir_shader_gather_info before
nir_lower_io_to_scalar_early).

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21787>
2023-03-28 14:41:54 +00:00
Daniel Stone
6a16ed8d79 CI: Disable freedreno
The proxy has been broken ever since the network went down.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22161>
2023-03-28 13:09:08 +00:00
Georg Lehmann
16c03fd756 aco/util: override default assignment operator for bitfield helpers
Otherwise, the default assignment operator copies the whole uint,
not just few bits we are interested in.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: e7559da757 ("aco: add bitfield array helper classes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22154>
2023-03-28 10:49:07 +00:00
Georg Lehmann
ed03696ed9 aco/ir: fix copy paste bug in convert_to_SDWA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 60cd3ba39f ("aco: copy abs/neg with assignment")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22154>
2023-03-28 10:49:07 +00:00
Friedrich Vock
1979e551a8 aco: Swap operands for v_and_b32 in RT prolog
The second operand must be a VGPR, only the first can be a literal.
With a literal, this code was wrongly assembled and resulted in artifacts on GFX11.

Fixes: 6446b79168 ("aco: implement select_rt_prolog()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8642
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22142>
2023-03-28 09:16:56 +00:00
Timur Kristóf
fd1e27a8f8 radv: Fix swizzled VS input loads when some components are unused.
Fix how out-of-bounds loads are decided.
It was incorrect because it mismatched the swizzle.
The decision is now made using the loaded num_components.

Fixes: 27c8131978
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8712
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22124>
2023-03-28 08:37:28 +00:00
Samuel Pitoiset
5bf6f6fed1 radv/rt: bind the pipeline stack when it's not dynamic
This overwrites the rt_stack_size cmdbuf state when a new rt pipeline
with a static stack size is bound.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22126>
2023-03-28 06:56:14 +00:00
Alyssa Rosenzweig
0f974d1f90 asahi: Convert to SPDX headers
Also drop my email address in the copyright lines and fix some "Copyright 208
Alyssa Rosenzweig" lines, I'm not *that* old. Together this drops a lot of
boilerplate without losing any meaningful licensing information. SPDX is already
in use for the MIT-licensed code in turnip, venus, and a few other scattered
parts of the tree, so this should be ok from a Mesa licensing standpoint.

This reduces friction to create new files, by parsing the copy/paste boilerplate
and being short enough you can easily type it out if you want.  It makes new
files seem less daunting: 20 lines of header for 30 lines of code is
discouraging, but 2 lines of header for 30 lines of code is reasonable for a
simple compiler pass. This has technical effects, as lowering the barrier to
making new files should encourage people to split code into more modular files
with (hopefully positive) effects on project compile time.

This helps with consistency between files. Across the tree we have at least a
half dozen variants of the MIT license text (probably more), plus code that uses
SPDX headers instead. I've already been using SPDX headers in Asahi manually, so
you can tell old vs new code based on the headers.

Finally, it means less for reviewers to scroll through adding files. Minimal
actual cognitive burden for reviewers thanks to banner blindness, but the big
headers still bloat diffs that add/delete files.

I originally proposed this in December (for much more of the tree) but someone
requested I wait until January to discuss. I've been trying to get in touch with
them since then. It is now almost April and, with still no response, I'd like to
press forward with this. So with a joint sign-off from the major authors of the
code in question, let's do this.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Rose Hudson <rose@krx.sh>
Acked-by: Lyude Paul [over IRC: "yes I'm fine with that"]
Meh'd-by: Rob Clark <robdclark@chromium.org>

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22062>
2023-03-28 05:14:00 +00:00
Lina Versace
ede5fed450 mailmap: Add Lina's new google.com address
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22153>
2023-03-28 03:37:43 +00:00
Harri Nieminen
ecf7a7da1b docs/svga3d: Fix typo
Found by codespell

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22149>
2023-03-28 02:31:05 +00:00
Harri Nieminen
1ffd591562 docs/panfrost: Fix typo
Found by codespell

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22149>
2023-03-28 02:31:05 +00:00
Harri Nieminen
eff5d950ea docs/freedreno: Fix typos
Found by codespell

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22149>
2023-03-28 02:31:05 +00:00
Harri Nieminen
c9378106ed docs/gallium: Fix typos
Found by codespell

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22149>
2023-03-28 02:31:05 +00:00
Harri Nieminen
8ebc01ee0b docs/specs: Fix typos
Found by codespell

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22149>
2023-03-28 02:31:05 +00:00
Filip Gawin
fa6ecd0032 crocus: don't quantize the clear value
Helps with:
spec@!opengl 1.0@depth-clear-precision-check@depth32f_stencil8,UnexpectedPass
spec@!opengl 3.0@clearbuffer-bug,UnexpectedPass

Cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22137>
2023-03-27 23:15:41 +00:00
Marek Olšák
5d8f0c570e amd/llvm: remove no-op code for vec3 loads in ac_build_tbuffer_load
Formatted loads always support vec3, so this code didn't do anything.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22117>
2023-03-27 22:38:07 +00:00
Marek Olšák
03c97b212e amd/llvm: fix handling of unsupported vec3 loads on gfx6
VMEM loads promoted from vec3 to vec4 didn't trim the vector, thus
returning vec4 on gfx6 and vec3 on later generations, which callers
don't expect.

SMEM loads were adding an extra component on gfx6, causing same issues.

Fixes: 82919e2d - amd: lower subdword UBO loads in NIR
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8693

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22117>
2023-03-27 22:38:07 +00:00
Georg Lehmann
dde7c5506c aco: make .clang-format usable with tests
Code between BEGIN_TEST and END_TEST should be indented,
and comments used by the test itself should not be reformatted.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22122>
2023-03-27 20:43:22 +00:00
Iago Toral Quiroga
40a00fc065 v3dv: fix format swizzle for buffer views
Fixes:
dEQP-VK.api.buffer_view.access.uniform_texel_buffer.b8g8r8a8_unorm

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22131>
2023-03-27 20:16:04 +00:00
Iago Toral Quiroga
3647b05ae9 v3dv: pause occlusion queries during vkCmdClearAttachments
We implement this by emitting a draw call, which should not be registered
during occlusion query counting.

Fixes:
dEQP-VK.query_pool.occlusion_query*clear*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22131>
2023-03-27 20:16:04 +00:00
Samuel Pitoiset
e61d68ac8a radv: move {esgs,gsvs}_ring_size to radv_legacy_gs_info
To update the ring info when a geometry shader is bound.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22134>
2023-03-27 18:54:50 +00:00
Samuel Pitoiset
c1c8aa49c8 radv: rename gfx9_gs_info to radv_legacy_gs_info
This was misleading because it's also needed on GFX6-8.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22134>
2023-03-27 18:54:50 +00:00
Jarred Davies
bc6f95c53e pvr: Add robustness buffer support
The robustness buffer is used when no vertex attribute can be loaded and
robustBufferAccess is enabled.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21579>
2023-03-27 18:36:32 +00:00
Jarred Davies
5fdfcc9913 pvr: Rename pvr_xgl_pds.c to pvr_pipeline_pds.c
Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21579>
2023-03-27 18:36:32 +00:00
Jarred Davies
bb8d47b09b pvr: Always mark robustBufferAccess as supported
As per the Vulkan spec, this is a required feature for graphics implementations.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21579>
2023-03-27 18:36:32 +00:00
Ilya K
679c84142f intel/vk/grl: don't install libgrl.a
It isn't used by anything at runtime and shouldn't be installed.
Saves about 3MB of space on the final artifacts on x86_64-linux.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8711
Fixes: 63966505 ("anv/grl: Build OpenCL kernels")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22133>
2023-03-27 18:00:48 +00:00
Samuel Pitoiset
cb9f94f84c radv: stop checking dynamic states when emitting the guardband state
If the primitive topology is part of the PSO, it's copied at pipeline
bind time to the dynamic state, so this checks is unnecessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22105>
2023-03-27 17:29:03 +00:00
Samuel Pitoiset
66fec16238 radv: add DI_PT_RECTLIST to si_conv_prim_to_gs_out()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22105>
2023-03-27 17:29:02 +00:00
Georg Lehmann
5e9ea15484 aco: fix p_interp_gfx11 comment
It no longer uses a tmp exec and scc.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22107>
2023-03-27 15:09:21 +00:00
Georg Lehmann
b1668aedaf aco: don't check usesModifiers for pseudo instructions
This can't happen.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22106>
2023-03-27 14:22:07 +00:00
Lucas Stach
9df5a2bd62 etnaviv: fix texture barrier implementation
The current implementation has a number of issues:
- it doesn't flush the depth cache, even though this can also be changed
  due to fragment shader operations and thus is included in the definition
  of glTextureBarrier
- it doesn't flush the vertex sampler cache
- it doesn't stall the pipeline until the flushes are done

Fix those issues and drop the comment, as it's pretty clear from the
code what is being done.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22104>
2023-03-27 14:03:53 +00:00
Lucas Stach
77ab87e5a7 etnaviv: flush VS texture cache when texture data is changed
If a sampler resource is changed the vertex texture caches also need to
be flushed, as those are separate from the fragment texture caches.

It seems that some cores need the VS sampler cache flush to be in a
separate state. I have seen no adverse effects of merging the TEXTUREVS
flush into a single flush state emission on GC3000 and up, but the blob
always emits the vertex sampler cache flush as a separate state, so do
the same here to avoid nasty surprises.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22104>
2023-03-27 14:03:53 +00:00
Erik Faye-Lund
e7ee11f89a docs/freedreno: fix turnip-heading level
Having two top-level headings in an article confuses Sphinx, and makes
both appear as separate articles in the toc-tree.

It doesn't seem like there's a good reason why the following headings
should be nested under the "Turnip"-heading anyway, so let's just make
it a sibling to the "Hardware architecture" heading.

Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21948>
2023-03-27 10:01:23 +00:00
Samuel Pitoiset
8f6998ad8a radv: separate the sample shading state between FS and graphics pipeline
Sample shading can be enabled inside the fragment shader and also
per-pipeline. Separate both cases to be able to enable sample shading
by only binding a FS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22110>
2023-03-27 09:29:12 +00:00
Samuel Pitoiset
774e055823 radv: move uses_user_sample_locations to radv_multisample_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22110>
2023-03-27 09:29:11 +00:00
Samuel Pitoiset
609edd6e96 radv: copy the multisample state to radv_cmd_state
To avoid relying on the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22110>
2023-03-27 09:29:11 +00:00