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Author SHA1 Message Date
Christian Gmeiner
2ad2d86e49 etnaviv: isa: Add struct etna_asm_result 
This struct contains the result of an assembler run and will be filled
in Rust and consumed via a C API.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
863023ceda etnaviv: isa: Add IsaParser proc_macro_derive 
This proc derive macro does the following magic:
 - read static rules file
 - parse isaspec xml file
 - generate valid pest PEG grammar and attaches it as grammar_inline to
   the ast
 - calls pest_generator::derive_parser(..) to generate the parser
 - creates FromPestRule trait
 - creates FromPestRule impl for enums and opcodes

This is the fundation of our assembler.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
575814af14 etnaviv: isa: Add meson version check 
meson had an issue [1] with proc_macro that got fixed in 1.4.0 and newer.

[1] https://github.com/mesonbuild/meson/issues/12758

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
0ce255a9f6 etnaviv: isa: Make header C++ safe 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
15a784689e etnaviv: isa: Generate Rust FFI bindings for asm.h 
We will work with etna_inst_* structs in Rust.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
59406a9d85 etnaviv: isa: Add meta elements to instructions 
This commits adds a meta elements with the following attributes:
- has_dest: does the instruction has a dest register?

- valid_srcs: which sources need to be valid?
  Is used to generate PEST grammar and defines which of the three source
  registers needs to be != void.

- type: which <template> shall be used?
  Must match a known template name by the last part.
  E.g.: <meta type=tex"/> --> <template name="INSTR_TEX">

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
9e3e12e6a9 meson: Add indexmap rust dependencies 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
02bc51f477 meson: Add roxmltree rust dependency 
Will be used for a simple isaspec implementation in rust.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Christian Gmeiner
e28ff81869 meson: Add pest rust dependencies 
Including its dependency ucd-trie.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
 2024-07-03 00:07:54 +00:00
Mauro Rossi
87ad3ca0ac intel/common: fix building error in intel_common.c 
Fixes the following building error:

../out_src/src/intel/common/intel_common.c:29:4: error: implicit declaration of function 'free' is invalid in C99 [-Werror,-Wimplicit-function-declarat
ion]
   free(engine_info);
   ^
1 error generated.

Fixes: 5b8b4f78 ("intel/dev: Add engine_class_supported_count to intel_device_info")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29975>
 2024-07-02 23:35:26 +00:00
Jesse Natalie
74ba5cf885 blake3: fix Windows ARM64 build and detect ARM64EC as ARM64 
Cherry-picked upstream 0816badf3ada3ec48e712dd4f4cbc2cd60828278

Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29971>
 2024-07-02 22:17:17 +00:00
Christian Gmeiner
3f91f2cf31 meson: Update syn subproject 
Fixes the following build error for fedora-release.

Error: method `inner` is never used
   --> ../subprojects/syn-2.0.39/src/attr.rs:589:8
    |
585 | pub(crate) trait FilterAttrs<'a> {
    |                  ----------- method in this trait
...
589 |     fn inner(self) -> Self::Ret;
    |        ^^^^^
    |
    = note: `-D dead-code` implied by `-D warnings`
    = help: to override `-D warnings` add `#[allow(dead_code)]`
error: aborting due to 1 previous error

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29996>
 2024-07-02 21:36:14 +00:00
Eric Engestrom
ab0956eec9 lavapipe/ci: skip timing out test 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30002>
 2024-07-02 21:20:47 +00:00
Mike Blumenkrantz
3d2d4f76d5 lavapipe: maint7 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29963>
 2024-07-02 21:06:13 +00:00
Iván Briano
9a68be59ca anv: enable VK_KHR_maintenance7 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29968>
 2024-07-02 20:24:43 +00:00
Iván Briano
53f196b8e0 vulkan/properties: handle LayeredApiPropertiesListKHR 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29968>
 2024-07-02 20:24:43 +00:00
Samuel Pitoiset
384392d729 vulkan: Update XML and headers to 1.3.289 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29968>
 2024-07-02 20:24:43 +00:00
Jianxun Zhang
597c6cdf20 isl: Add some formats not covered in CMF table (xe2) 
The CMF values of these formats are not explicitly defined in the
spec. Refer to the added comment for more details.

Fixed Piglit tests:

[ISL_FORMAT_L8A8_UNORM_SRGB]
getteximage-formats -auto -fbo

[ISL_FORMAT_L8_UNORM_SRGB]
teximage-colors GL_SLUMINANCE8 -auto -fbo

[ISL_FORMAT_R9G9B9E5_SHAREDEXP]
fbo-generatemipmap-3d RGB9_E5 -auto -fbo

src/intel/isl/isl_genX_helpers.h:322: isl_get_render_compression_format:
Assertion `!"" "Unsupported render compression format!"' failed.

Also bump up Bspec revision in comments.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28620>
 2024-07-02 19:03:19 +00:00
Jianxun Zhang
77c83069ad intel/dev: Select a compressed PAT entry (xe2) 
Fix glxgears (LNL)

glxgears: xe/iris_kmd_backend.c:81: xe_gem_create:
Assertion `!"" "missing"' failed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28620>
 2024-07-02 19:03:19 +00:00
Jianxun Zhang
c9ee484f21 blorp: Ensure MSAA fast clear in correct modes (xe2) 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28620>
 2024-07-02 19:03:19 +00:00
Ganesh Belgur Ramachandra
9c8dffd282 radeonsi: add GL_ARB_texture_filter_minmax extension 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29653>
 2024-07-02 18:27:00 +00:00
Ganesh Belgur Ramachandra
1f9bafbc74 radeonsi: add GL_EXT_texture_filter_minmax extension 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29653>
 2024-07-02 18:27:00 +00:00
Dylan Baker
11c27a6237 egl/wayland: fix memory leak in error handling case 
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29990>
 2024-07-02 17:45:12 +00:00
Jesse Natalie
137c506a7a subprojects: Use depth=1 in the git wrap files 
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29361>
 2024-07-02 16:54:32 +00:00
Tim Huang
076cbf605e amd/vpelib: support VPE IP v6.1.3 
Use VPE_IP_LEVEL_1_0 for VPE IP version 6.1.3.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29930>
 2024-07-02 12:05:23 +00:00
Tim Huang
e322b2b683 amd: add GFX v11.5.2 support 
This is to enable GFX v11.5.2 support.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29930>
 2024-07-02 12:05:23 +00:00
Christian Gmeiner
9945f9e8d3 meson: Update proc-macro2 subproject 
There is a fix in 1.0.76 release that fixes an issue I have
seen on CI (fedora-release). Lets jump to the most recent
version 1.0.86.

See: https://github.com/dtolnay/proc-macro2/pull/435

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29992>
 2024-07-02 10:19:53 +00:00
Danylo Piliaiev
f77e9d8c4a ir3: Print bindless samp/tex ids for tex prefetch 
@tex(r0.z)  src=4, bindless=1, samp=4, tex=3, wrmask=0x7, opc=sam
@tex(r1.y)  src=4, bindless=1, samp=2, tex=1, wrmask=0xf, opc=sam

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29989>
 2024-07-02 08:16:02 +00:00
Juan A. Suarez Romero
c157e8991e v3d: use original enabled_mask on setting vertex buffers 
Current code uses a non-initialized enabled_mask to set the vertex
buffers mask, instead of using the original value from
`so->enabled_mask`

Let's use the original field instead of using an intermediate variable.

Fixes: cbcfb34cf7 ("v3d: use BITSET for the masks")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29987>
 2024-07-02 07:20:47 +00:00
Yiwei Zhang
2d728a037a venus: tentative fix for test flakiness from invalid ring wait 
If ring is already current when creating bo, we skip the ring wait but
miss to invalidate bo ring seqno. There's a false-positive for sending a
ring wait upon free memory if the ring has consumed about UINT32_MAX
bytes of traffic (unrelated to ring size).

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29988>
 2024-07-02 03:25:49 +00:00
Renato Pereyra
de0d237ab0 intel/perf: Move sysmacros.h include from header to implementation 
sysmacros.h defines macros `minor()` and `major()`. These macros conflict
with a definition of `minor()` in the Perfetto SDK header. Move the
sysmacros.h include to intel_perf.c because the Perfetto header is only
included at the same time as intel_perf.h not *.c (in intel_driver_ds.cc).

Unbeknown to anyone, the definition of `minor()` in the Perfetto header is
being replaced with the macro. See the MR attachment for an example.

Signed-off-by: Renato Pereyra <renatopereyra@chromium.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29974>
 2024-07-01 22:02:49 +00:00
Paulo Zanoni
4aa3b2d3ad anv: LNL+ doesn't need the special flush for sparse 
Newer hardware is smart enough to know that if something writes to a
NULL tile and immediately reads back the value (from the cache), the
value should read back as zero, not whatever was written to the cache
but not the memory. Due to that, we don't need to flush the tile
cache, which is quite expensive.

Link: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11029
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29953>
 2024-07-01 21:28:26 +00:00
Mike Blumenkrantz
0b864388fd egl: only enable MESA_image_dma_buf_export with PIPE_CAP_DMABUF 
very minor nitpick but technically more correct

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29939>
 2024-07-01 19:32:23 +00:00
Mike Blumenkrantz
739694403d egl: deduplicate MESA_image_dma_buf_export enablement 
no functional changes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29939>
 2024-07-01 19:32:23 +00:00
Sagar Ghuge
99ce8b5a07 intel/compiler: Add indirect mov lowering pass 
Indirect addressing(vx1 and vxh) not supported with UB/B datatype for
src0, so we need to change the data type for both dest and src0.

This fixes following tests cases on Xe2+
 - dEQP-VK.spirv_assembly.instruction.compute.8bit_storage.push_constant_8_to_16*
 - dEQP-VK.spirv_assembly.instruction.compute.8bit_storage.push_constant_8_to_32*

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29316>
 2024-07-01 19:06:31 +00:00
Kenneth Graunke
1e69ec3b8d intel/brw: Add a lower_csel pass and allow building it for all types 
We can do CSEL on F, HF, *W, and *D on Gfx11+.  Gfx9 can only do F.

We can lower unsupported types to CMP+CSEL, allowing us to use CSEL
in the IR and not worry about the limitations.

Rework: (Sagar)
- Update validation pass for CSEL

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29316>
 2024-07-01 19:06:31 +00:00
Mike Blumenkrantz
cb7b1a8d23 zink: remove adreno from broken_cache_semantics driver workaround 
the proprietary driver was never affected by this, and turnip should
no longer be affected after some recent MRs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29174>
 2024-07-01 18:37:46 +00:00
Dylan Baker
dc604f340a anv/grl: add some validation that we're not going to overflow 
Coverity has spotted a place where we could in theory overflow. In
reality it wont happen as the potential overflow is a bitfield with a
maximum of two values. Add an `assume()` statement to help out the
compiler and document our assumption.

fixes: dc1aedef2b

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29825>
 2024-07-01 18:11:38 +00:00
Rhys Perry
1643c933ef aco/gfx11: don't use v_bfrev_b32 with wave64 
v_mov_b32 can be dual issued.

fossil-db (navi31):
Totals from 1792 (2.26% of 79395) affected shaders:
CodeSize: 27462476 -> 27470308 (+0.03%); split: -0.00%, +0.03%
Latency: 29403214 -> 29402713 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 5005863 -> 5004702 (-0.02%); split: -0.02%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
52e9370c13 aco: replace constant v_bfrev_b32 with v_mov_b32 to create vopd 
fossil-db (navi31, wave32):
Totals from 1523 (1.92% of 79395) affected shaders:
Instrs: 1502625 -> 1501998 (-0.04%); split: -0.05%, +0.01%
CodeSize: 8980508 -> 8983032 (+0.03%); split: -0.00%, +0.03%
Latency: 8405687 -> 8405375 (-0.00%); split: -0.01%, +0.01%
InvThroughput: 1567484 -> 1566728 (-0.05%); split: -0.05%, +0.00%
VALU: 732709 -> 732058 (-0.09%); split: -0.09%, +0.00%
VOPD: 158191 -> 158842 (+0.41%); split: +0.41%, -0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
17758f0a02 aco: fix wmma raw hazard 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
a6eb5c9caa aco: use alignment information in visit_load_constant() 
The intrinsic has this now.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
7c995df9aa aco: fix follow_operand with combined label_extract and label_split 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
9ee24db882 aco: add missing isConstant()/isTemp() checks 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
5e1d3f571d aco: turn split(vec()) into p_parallelcopy instead of p_create_vector 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
f842bd81ca aco: use s_pack_*_b32_b16 more in p_insert/p_extract lowering 
This opcode doesn't write SCC, which gives later passes more freedom to
move instructions.

fossil-db (navi21):
Totals from 727 (0.92% of 79395) affected shaders:
Latency: 14943483 -> 14942704 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 3225790 -> 3225766 (-0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:22 +00:00
Rhys Perry
ca161a96d1 aco: combine extracts into s_pack_ll_b32_b16 
fossil-db (navi21):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 45941 -> 45924 (-0.04%)
CodeSize: 241768 -> 241756 (-0.00%)
Latency: 176501 -> 176491 (-0.01%)
Copies: 6884 -> 6882 (-0.03%)
SALU: 6101 -> 6088 (-0.21%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:21 +00:00
Rhys Perry
98cb50297b aco: use s_pack_ll_b32_b16 for pack_32_2x16_split 
fossil-db (navi21):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 45963 -> 45941 (-0.05%)
CodeSize: 241908 -> 241768 (-0.06%)
Latency: 176508 -> 176501 (-0.00%)
SALU: 6123 -> 6101 (-0.36%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29912>
 2024-07-01 17:34:21 +00:00
Samuel Pitoiset
6326cc4a5e radv: use radv_get_user_sgpr() more in DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980>
 2024-07-01 16:54:09 +00:00
Samuel Pitoiset
598e85b3e9 radv: use the graphics pipeline from the DGC info 
Doesn't change anything because it's required to bind one graphics
pipeline before using DGC but it's cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29980>
 2024-07-01 16:54:09 +00:00