Marek Olšák
060d5dacfd
ac: add gfx12 DCC shared code
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
1ea96a47cd
ac/nir/lower_ngg: use voffset in global_atomic_add for xfb
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
b002564633
ac/nir/lower_ngg: use global_atomic_amd to fix gfx12 streamout
...
The intrinsics are lowered before this is called.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Marek Olšák
5db194b1d1
ac/descriptors: fix gfx12 regressions
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510 >
2024-06-06 01:01:46 +00:00
Jordan Justen
e02c6663e9
intel/tools: Fix intel_dev_info --hwconfig switch
...
Since a42a5bf87e
, we've been closing the file descriptor immediately
after loading the devinfo struct.
intel_get_and_print_hwconfig_table() re-queries the hwconfig info from
the device to print out all the entries, so we need to leave the fd
open for this use. I moved the close() call to all paths which exit
the for loop's current iteration.
Ref: a42a5bf87e
("intel/devinfo: add an option to pick platform to print")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29549 >
2024-06-06 00:41:13 +00:00
Sagar Ghuge
2dba5d484b
intel/fs: Adjust destination register size for global atomic on Xe2+
...
For 16-bit data type, we are padding 16-bit and using 32-bit data type,
so we need to account for the padded portion while calculating the
size_written.
Rework: (Rohan)
- Drop unnecessary fs_builder instance
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29271 >
2024-06-06 00:18:37 +00:00
Sagar Ghuge
55c7b24899
intel/fs: Adjust destination register size for untyped atomic on Xe2+
...
For 16-bit data type, we are padding 16-bit and using 32-bit data type,
so we need to account for the padded portion while calculating the
size_written.
Rework: (Rohan)
- Drop unnecessary fs_builder instance
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29271 >
2024-06-06 00:18:37 +00:00
Jordan Justen
1fa84d34ef
intel/compiler: Don't set size written in brw_lower_logical_sends.cpp
...
Rework: (Sagar)
- Drop unused variable
Suggested-by: Francisco Jerez <currojerez@riseup.net >
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29271 >
2024-06-06 00:18:37 +00:00
Zach Battleman
ecfe8b0f75
intel/brw: update Wa_1805992985 to use workarounds mechanism
...
Replaced two instances of checking version 11 with the new workaround
mechanism.
Reviewed-by: Mark Janes <markjanes@swizzler.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29560 >
2024-06-05 23:45:33 +00:00
Zach Battleman
ddaa7c4221
intel/brw: update comment to accurately reflect intended behavior
...
Removed mention of Wa_* when referencing an intended harware behavior
since version 12. This will prevent the erroneous usage of the
`intel_needs_workaround` in the future.
Reviewed-by: Mark Janes <markjanes@swizzler.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29559 >
2024-06-05 23:23:30 +00:00
Karol Herbst
fe5b0a4fe3
rusticl/kernel/launch: add helper to bind global buffers
...
At some point I want to create a builder, but that's what I want to do
later.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
17a52774db
rusticl/kernel/launch: get rid of Arc clones for global resources
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
5c1122728a
rusticl/kernel/launch: rework how the printf buffer is allocated
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
25d1f84b57
rusticl/kernel/launch: move allocation of resources vec
...
This way its capacity is actually correct and skips a reallocation.
Also optimize it for the globals vec as well while at it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
bb2453c649
rusticl/kernel: move most of the code in launch inside the closure
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
436122cb10
rusticl/kernel/launch: remove useless upload of the input
...
It's already done right before each launch_grid call, no point in doing it
before the loop.
Fixes: 91552bb4ec
("rusticl: lower huge grids")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Karol Herbst
d02dfe0f71
rusticl/kernel/launch: fix mapping usize types to GPU pointer sizes
...
I incorrectly assumed the API side defines how those values are sized, but
it's actually the GPU's pointer size. The API is simply reduced to 32 bit
ranges in 32 bit mode, but has to still pass in 64 bit values to the GPU.
Also use explicit types in a couple of places to prevent such mistakes in
the future.
Fixes: 204c287327
("rusticl/kernel: properly handle grid and offsets being usize")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527 >
2024-06-05 23:11:26 +00:00
Eric Engestrom
4086d3aa38
docs: update calendar for 24.1.1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29558 >
2024-06-05 22:22:04 +00:00
Eric Engestrom
3c66a88a0a
docs: add sha256sum for 24.1.1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29558 >
2024-06-05 22:22:04 +00:00
Eric Engestrom
2f41aad910
docs: add release notes for 24.1.1
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29558 >
2024-06-05 22:22:04 +00:00
Iván Briano
1c6a6349b0
intel/brw: always read LAYER/VIEWPORT from the FS payload
...
Following on https://gitlab.freedesktop.org/mesa/mesa/-/issues/9811 the
restriction that kept us from using the payload values for non-mesh
cases is gone, so just use the same codepath for everything.
But since we have functions that correctly read those for all gens, use
those instead of the broken hack we had until now.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9796
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29448 >
2024-06-05 21:52:51 +00:00
Iván Briano
3d071fe7db
intel/brw: add fetch_viewport_index function
...
Like fetch_render_target_array_index(), it reads the values provided by
the FS payload.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29448 >
2024-06-05 21:52:51 +00:00
Lionel Landwerlin
816b21cd87
anv: fix pipeline flag fields
...
Using the wrong type truncate the top bits of the pipeline flags.
Currently we don't have any bit in the top bits so not fixing any bug,
but in the future new extension could add some.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 688bb37552
("anv: deal with new pipeline flags")
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29553 >
2024-06-05 20:30:16 +00:00
Nanley Chery
53e77cef36
intel/blorp: Allow gfx12 fast-clears without CCS surf
...
I'd like to phase out the ISL surface representation of CCS on gfx120 in
order to enable CCS without a 512B-aligned main surface pitch. Remove
the dependency on CCS ISL surfaces when fast-clearing to move drivers
one step towards that goal.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28536 >
2024-06-05 20:08:26 +00:00
Nanley Chery
18326211c3
intel/blorp: Factor bpb into the fast-clear rect
...
The vertical alignment of the fast-clear rectangle shrinks as the
bits-per-block of the CCS format increases.
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28536 >
2024-06-05 20:08:26 +00:00
Eric Engestrom
8f483caffb
v3dv: add missing bounds check in VK_EXT_4444_formats
...
Fixes: fbe4d7ccf4
("v3dv: implement VK_EXT_4444_formats")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29481 >
2024-06-05 19:10:24 +00:00
David Rosca
d1b794685f
frontends/va: Send all bitstream buffers to driver at once
...
Usually applications will submit one buffer per slice. Instead of
sending it to driver in parts, send all submitted buffers at the
end of vlVaRenderPicture.
Avoids excessive reallocations in driver.
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29131 >
2024-06-05 18:12:02 +00:00
Tapani Pälli
bbe9ab54d4
mesa: remove some conditions in mipmap code
...
This function already asserts that we have ZS format without stencil,
it should be guaranteed to have depth in it.
CID: 1602463
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29534 >
2024-06-05 17:38:23 +00:00
Alejandro Piñeiro
5eee101477
broadcom: move HW-dependant constants to v3d_device_info
...
Right now we have some HW-dependant constants that we are accessing
using the same mechanism that some hw-dependant functions, through a
macro (V3DV_X macro).
But this means that each time that we need to get those constant
values, we need to do a hw version check. Also, right now both the
macro and the defines with each HW value are duplicated on v3d and
v3dv. Also that macro is ugly and has a ugly name.
This commit moves those values to the already common v3d_device_info
structure.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29535 >
2024-06-05 17:14:59 +00:00
Alejandro Piñeiro
b0f3923d8a
v3d/devinfo: unify comment style
...
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29535 >
2024-06-05 17:14:59 +00:00
Juan A. Suarez Romero
bb15ecfc0b
broadcom/ci: update expected results
...
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29551 >
2024-06-05 16:55:46 +00:00
Tapani Pälli
e6b24221af
anv: implement WA 14018283232
...
WA 14018283232 indicates that we need to emit the resource barrier
when the following expression toggles value :
STATE_DEPTH_BOUNDS::depthboundstestenable & 3DSTATE_PS_EXTRA:: Pixel Shader Kills Pixel & 3DSTATE_PS_EXTRA:: Pixel Shader Valid
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Rohan Garg
01faec2709
intel/genxml: Add RESOURCE_BARRIER for xe2
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Lionel Landwerlin
108e79db1a
anv: factor out some more gpu_memcpy setup
...
We want to have all the setup/workaround in a single spot.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Lionel Landwerlin
d98c47ccc3
anv: rewrite Wa_18019816803 tracking to be more like state
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29297 >
2024-06-05 15:22:25 +00:00
Samuel Pitoiset
f7e6609390
radv: assert that GDS/GDS OA buffers can't be created on GFX12
...
No GDS on GFX12 and this will be annoying for some queries that
currently rely on atomic GDS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
8e9e877eb2
radv: cleanup radv_precompute_registers_hw_{ngg,fs}
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
d5074228ab
radv: do not set VGT_PRIMITIVEID_EN.PRIMITIVEID_EN on GFX12
...
This bitfield doesn't exist.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
87c1b981d9
radv: fix configuring NGG registers on GFX12
...
ac_compute_late_alloc() shouldn't be called on GFX12.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
052655b65d
radv: do not emit SPI_SHADER_PGM_RSRC3_GS on GFX12
...
This register shouldn't be emitted according to RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
e6609fa004
radv: update configuring PA_SC_WINDOW_SCISSOR on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
f6aeb86f35
radv: update configuring depth stencil buffers on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
d9650fef24
radv: update configuring color buffers on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
a06aaef704
radv: update number of input VGPRs for VS on GFX12
...
InstanceID is in VGPR1.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
b912d2f899
radv: configure PA_SC_SAMPLE_PROPERTIES on GFX12
...
MAX_SAMPLE_DIST has been moved from PA_SC_AA_CONFIG.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Samuel Pitoiset
aa02cd2a1b
ac,radeonsi: set COLOR_SW_MODE for mutable CB surfaces on GFX12
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525 >
2024-06-05 14:47:27 +00:00
Iago Toral Quiroga
c6cacc5166
v3dv: implement vkGetRenderingAreaGranularityKHR
...
Introduced with VK_KHR_maintenance5, this is equivalent to
vkGetRenderAreaGranularity but for dynamic rendering where
we don't have render passes.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29468 >
2024-06-05 14:21:05 +00:00
Konstantin Seurer
8dc364806e
radv/ci: Bring back vkcts-navi21-llvm-valve
...
Most of the issues were fixed. Let's see how long it will last until it
has to be disabled again.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293 >
2024-06-05 13:41:47 +00:00
Konstantin Seurer
b100d3f731
ac/llvm: Enable helper invocations for vote_all/any
...
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293 >
2024-06-05 13:41:47 +00:00
Konstantin Seurer
2b38d4922e
ac/llvm: Fix DENORM_FLUSH_TO_ZERO with exact instructions
...
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293 >
2024-06-05 13:41:47 +00:00