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r600/sfn: plumb the chip class into the instruction emission

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In order to emit the correct instruction sequences for cayman
we need this info.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
This commit is contained in:
Dave Airlie
2020-05-18 15:14:35 +10:00
committed by Marge Bot
parent 164aed6c81
commit ff9c95421a
19 changed files with 59 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/gallium/drivers/r600/sfn/sfn_defines.h
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@@ -28,7 +28,7 @@
#define sfn_defines_h
#include "../r600_isa.h"
#include "amd_family.h"
namespace r600 {

5
src/gallium/drivers/r600/sfn/sfn_emitinstruction.cpp
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@@ -148,6 +148,11 @@ PValue EmitInstruction::create_register_from_nir_src(const nir_src& src, unsigne
return m_proc.create_register_from_nir_src(src, swizzle);
}
enum chip_class EmitInstruction::get_chip_class(void) const
{
return m_proc.get_chip_class();
}
const std::set<AluModifiers> EmitInstruction::empty = {};
const std::set<AluModifiers> EmitInstruction::write = {alu_write};
const std::set<AluModifiers> EmitInstruction::last_write = {alu_write, alu_last_instr};

3
src/gallium/drivers/r600/sfn/sfn_emitinstruction.h
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@@ -28,6 +28,7 @@
#define EMITINSTRUCTION_H
#include "compiler/nir/nir.h"
#include "sfn_defines.h"
#include "sfn_value.h"
#include "sfn_instruction_alu.h"
@@ -82,7 +83,7 @@ protected:
void load_uniform(const nir_alu_src& src);
const nir_variable *get_deref_location(const nir_src& v) const;
enum chip_class get_chip_class(void) const;
private:

20
src/gallium/drivers/r600/sfn/sfn_nir.cpp
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@@ -55,34 +55,35 @@ ShaderFromNir::ShaderFromNir():sh(nullptr),
bool ShaderFromNir::lower(const nir_shader *shader, r600_pipe_shader *pipe_shader,
r600_pipe_shader_selector *sel, r600_shader_key& key,
struct r600_shader* gs_shader)
struct r600_shader* gs_shader, enum chip_class _chip_class)
{
sh = shader;
chip_class = _chip_class;
assert(sh);
switch (shader->info.stage) {
case MESA_SHADER_VERTEX:
impl.reset(new VertexShaderFromNir(pipe_shader, *sel, key, gs_shader));
impl.reset(new VertexShaderFromNir(pipe_shader, *sel, key, gs_shader, chip_class));
break;
case MESA_SHADER_TESS_CTRL:
sfn_log << SfnLog::trans << "Start TCS\n";
impl.reset(new TcsShaderFromNir(pipe_shader, *sel, key));
impl.reset(new TcsShaderFromNir(pipe_shader, *sel, key, chip_class));
break;
case MESA_SHADER_TESS_EVAL:
sfn_log << SfnLog::trans << "Start TESS_EVAL\n";
impl.reset(new TEvalShaderFromNir(pipe_shader, *sel, key, gs_shader));
impl.reset(new TEvalShaderFromNir(pipe_shader, *sel, key, gs_shader, chip_class));
break;
case MESA_SHADER_GEOMETRY:
sfn_log << SfnLog::trans << "Start GS\n";
impl.reset(new GeometryShaderFromNir(pipe_shader, *sel, key));
impl.reset(new GeometryShaderFromNir(pipe_shader, *sel, key, chip_class));
break;
case MESA_SHADER_FRAGMENT:
sfn_log << SfnLog::trans << "Start FS\n";
impl.reset(new FragmentShaderFromNir(*shader, pipe_shader->shader, *sel, key));
impl.reset(new FragmentShaderFromNir(*shader, pipe_shader->shader, *sel, key, chip_class));
break;
case MESA_SHADER_COMPUTE:
sfn_log << SfnLog::trans << "Start CS\n";
impl.reset(new ComputeShaderFromNir(pipe_shader, *sel, key));
impl.reset(new ComputeShaderFromNir(pipe_shader, *sel, key, chip_class));
break;
default:
return false;
@@ -677,9 +678,9 @@ int r600_shader_from_nir(struct r600_context *rctx,
struct r600_shader* gs_shader = nullptr;
if (rctx->gs_shader)
gs_shader = &rctx->gs_shader->current->shader;
r600_screen *rscreen = rctx->screen;
bool r = convert.lower(sel->nir, pipeshader, sel, *key, gs_shader);
bool r = convert.lower(sel->nir, pipeshader, sel, *key, gs_shader, rscreen->b.chip_class);
if (!r || rctx->screen->b.debug_flags & DBG_ALL_SHADERS) {
static int shnr = 0;
@@ -701,7 +702,6 @@ int r600_shader_from_nir(struct r600_context *rctx,
auto shader = convert.shader();
r600_screen *rscreen = rctx->screen;
r600_bytecode_init(&pipeshader->shader.bc, rscreen->b.chip_class, rscreen->b.family,
rscreen->has_compressed_msaa_texturing);

3
src/gallium/drivers/r600/sfn/sfn_nir.h
View File

@@ -57,7 +57,7 @@ public:
bool lower(const nir_shader *shader, r600_pipe_shader *sh,
r600_pipe_shader_selector *sel, r600_shader_key &key,
r600_shader *gs_shader);
r600_shader *gs_shader, enum chip_class chip_class);
bool process_declaration();
@@ -79,6 +79,7 @@ private:
std::unique_ptr<ShaderFromNirProcessor> impl;
const nir_shader *sh;
enum chip_class chip_class;
int m_current_if_id;
int m_current_loop_id;
std::stack<int> m_if_stack;

9
src/gallium/drivers/r600/sfn/sfn_shader_base.cpp
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@@ -58,12 +58,14 @@ using namespace std;
ShaderFromNirProcessor::ShaderFromNirProcessor(pipe_shader_type ptype,
r600_pipe_shader_selector& sel,
r600_shader &sh_info, int scratch_size):
r600_shader &sh_info, int scratch_size,
enum chip_class chip_class):
m_processor_type(ptype),
m_nesting_depth(0),
m_block_number(0),
m_export_output(0, -1),
m_sh_info(sh_info),
m_chip_class(chip_class),
m_tex_instr(*this),
m_alu_instr(*this),
m_ssbo_instr(*this),
@@ -95,6 +97,11 @@ bool ShaderFromNirProcessor::scan_instruction(nir_instr *instr)
return scan_sysvalue_access(instr);
}
enum chip_class ShaderFromNirProcessor::get_chip_class(void) const
{
return m_chip_class;
}
static void remap_shader_info(r600_shader& sh_info,
std::vector<rename_reg_pair>& map,
UNUSED ValueMap& values)

5
src/gallium/drivers/r600/sfn/sfn_shader_base.h
View File

@@ -56,7 +56,7 @@ extern SfnLog sfn_log;
class ShaderFromNirProcessor : public ValuePool {
public:
ShaderFromNirProcessor(pipe_shader_type ptype, r600_pipe_shader_selector& sel,
r600_shader& sh_info, int scratch_size);
r600_shader& sh_info, int scratch_size, enum chip_class _chip_class);
virtual ~ShaderFromNirProcessor();
void emit_instruction(Instruction *ir);
@@ -83,6 +83,7 @@ public:
const GPRVector *output_register(unsigned location) const;
void evaluate_spi_sid(r600_shader_io &io);
enum chip_class get_chip_class() const;
protected:
void set_var_address(nir_deref_instr *instr);
@@ -191,7 +192,7 @@ private:
unsigned m_block_number;
InstructionBlock m_export_output;
r600_shader& m_sh_info;
enum chip_class m_chip_class;
EmitTexInstruction m_tex_instr;
EmitAluInstruction m_alu_instr;
EmitSSBOInstruction m_ssbo_instr;

5
src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp
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@@ -31,9 +31,10 @@ namespace r600 {
ComputeShaderFromNir::ComputeShaderFromNir(r600_pipe_shader *sh,
r600_pipe_shader_selector& sel,
UNUSED const r600_shader_key& key):
UNUSED const r600_shader_key& key,
enum chip_class chip_class):
ShaderFromNirProcessor (PIPE_SHADER_COMPUTE, sel, sh->shader,
sh->scratch_space_needed),
sh->scratch_space_needed, chip_class),
m_reserved_registers(0)
{
}

3
src/gallium/drivers/r600/sfn/sfn_shader_compute.h
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@@ -38,7 +38,8 @@ class ComputeShaderFromNir : public ShaderFromNirProcessor
public:
ComputeShaderFromNir(r600_pipe_shader *sh,
r600_pipe_shader_selector& sel,
const r600_shader_key &key);
const r600_shader_key &key,
enum chip_class chip_class);
bool scan_sysvalue_access(nir_instr *instr) override;

5
src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp
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@@ -34,8 +34,9 @@ namespace r600 {
FragmentShaderFromNir::FragmentShaderFromNir(const nir_shader& nir,
r600_shader& sh,
r600_pipe_shader_selector &sel,
const r600_shader_key &key):
ShaderFromNirProcessor(PIPE_SHADER_FRAGMENT, sel, sh, nir.scratch_size),
const r600_shader_key &key,
enum chip_class chip_class):
ShaderFromNirProcessor(PIPE_SHADER_FRAGMENT, sel, sh, nir.scratch_size, chip_class),
m_max_color_exports(MAX2(key.ps.nr_cbufs,1)),
m_max_counted_color_exports(0),
m_two_sided_color(key.ps.color_two_side),

3
src/gallium/drivers/r600/sfn/sfn_shader_fragment.h
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@@ -36,7 +36,8 @@ namespace r600 {
class FragmentShaderFromNir : public ShaderFromNirProcessor {
public:
FragmentShaderFromNir(const nir_shader& nir, r600_shader& sh_info,
r600_pipe_shader_selector &sel, const r600_shader_key &key);
r600_pipe_shader_selector &sel, const r600_shader_key &key,
enum chip_class chip_class);
bool scan_sysvalue_access(nir_instr *instr) override;
private:

5
src/gallium/drivers/r600/sfn/sfn_shader_geometry.cpp
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@@ -33,9 +33,10 @@ namespace r600 {
GeometryShaderFromNir::GeometryShaderFromNir(r600_pipe_shader *sh,
r600_pipe_shader_selector &sel,
const r600_shader_key &key):
const r600_shader_key &key,
enum chip_class chip_class):
VertexStage(PIPE_SHADER_GEOMETRY, sel, sh->shader,
sh->scratch_space_needed),
sh->scratch_space_needed, chip_class),
m_pipe_shader(sh),
m_so_info(&sel.so),
m_first_vertex_emitted(false),

2
src/gallium/drivers/r600/sfn/sfn_shader_geometry.h
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@@ -35,7 +35,7 @@ namespace r600 {
class GeometryShaderFromNir : public VertexStage
{
public:
GeometryShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel, const r600_shader_key& key);
GeometryShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel, const r600_shader_key& key, enum chip_class chip_class);
bool do_emit_load_deref(const nir_variable *in_var, nir_intrinsic_instr* instr) override;
bool do_emit_store_deref(const nir_variable *out_var, nir_intrinsic_instr* instr) override;
bool scan_sysvalue_access(nir_instr *instr) override;

5
src/gallium/drivers/r600/sfn/sfn_shader_tcs.cpp
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@@ -6,9 +6,10 @@ namespace r600 {
TcsShaderFromNir::TcsShaderFromNir(r600_pipe_shader *sh,
r600_pipe_shader_selector& sel,
const r600_shader_key& key):
const r600_shader_key& key,
enum chip_class chip_class):
ShaderFromNirProcessor (PIPE_SHADER_TESS_CTRL, sel, sh->shader,
sh->scratch_space_needed),
sh->scratch_space_needed, chip_class),
m_reserved_registers(0)
{
sh_info().tcs_prim_mode = key.tcs.prim_mode;

2
src/gallium/drivers/r600/sfn/sfn_shader_tcs.h
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@@ -8,7 +8,7 @@ namespace r600 {
class TcsShaderFromNir : public ShaderFromNirProcessor
{
public:
TcsShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel, const r600_shader_key& key);
TcsShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel, const r600_shader_key& key, enum chip_class chip_class);
bool scan_sysvalue_access(nir_instr *instr) override;
private:

5
src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.cpp
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@@ -4,9 +4,10 @@
namespace r600 {
TEvalShaderFromNir::TEvalShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel,
const r600_shader_key& key, r600_shader *gs_shader):
const r600_shader_key& key, r600_shader *gs_shader,
enum chip_class chip_class):
VertexStage(PIPE_SHADER_TESS_EVAL, sel, sh->shader,
sh->scratch_space_needed),
sh->scratch_space_needed, chip_class),
m_reserved_registers(0),
m_key(key)

3
src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.h
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@@ -10,7 +10,8 @@ class TEvalShaderFromNir : public VertexStage
{
public:
TEvalShaderFromNir(r600_pipe_shader *sh, r600_pipe_shader_selector& sel,
const r600_shader_key& key, r600_shader *gs_shader);
const r600_shader_key& key, r600_shader *gs_shader,
enum chip_class chip_class);
bool scan_sysvalue_access(nir_instr *instr) override;
PValue primitive_id() override {return m_primitive_id;}
private:

5
src/gallium/drivers/r600/sfn/sfn_shader_vertex.cpp
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@@ -40,9 +40,10 @@ using std::priority_queue;
VertexShaderFromNir::VertexShaderFromNir(r600_pipe_shader *sh,
r600_pipe_shader_selector& sel,
const r600_shader_key& key,
struct r600_shader* gs_shader):
struct r600_shader* gs_shader,
enum chip_class chip_class):
VertexStage(PIPE_SHADER_VERTEX, sel, sh->shader,
sh->scratch_space_needed),
sh->scratch_space_needed, chip_class),
m_num_clip_dist(0),
m_last_param_export(nullptr),
m_last_pos_export(nullptr),

3
src/gallium/drivers/r600/sfn/sfn_shader_vertex.h
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@@ -36,7 +36,8 @@ class VertexShaderFromNir : public VertexStage {
public:
VertexShaderFromNir(r600_pipe_shader *sh,
r600_pipe_shader_selector &sel,
const r600_shader_key &key, r600_shader *gs_shader);
const r600_shader_key &key, r600_shader *gs_shader,
enum chip_class chip_class);
bool do_emit_load_deref(const nir_variable *in_var, nir_intrinsic_instr* instr) override;
bool scan_sysvalue_access(nir_instr *instr) override;