anv: add analysis for push descriptor uses and store it in shader cache
We'll use this information to avoid : - binding table emission - allocation of surface states v2: Fix anv_nir_push_desc_ubo_fully_promoted() Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Emma Anholt <emma@anholt.net> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
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@@ -1102,6 +1102,7 @@ struct anv_queue {
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struct nir_xfb_info;
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struct anv_pipeline_bind_map;
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struct anv_push_descriptor_info;
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extern const struct vk_pipeline_cache_object_ops *const anv_cache_import_ops[2];
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@@ -1122,7 +1123,8 @@ anv_device_upload_kernel(struct anv_device *device,
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const struct brw_compile_stats *stats,
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uint32_t num_stats,
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const struct nir_xfb_info *xfb_info,
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const struct anv_pipeline_bind_map *bind_map);
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const struct anv_pipeline_bind_map *bind_map,
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const struct anv_push_descriptor_info *push_desc_info);
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struct nir_shader;
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struct nir_shader_compiler_options;
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@@ -1950,6 +1952,11 @@ struct anv_pipeline_binding {
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*/
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uint32_t index;
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/** Binding in the descriptor set. Not valid for any of the
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* ANV_DESCRIPTOR_SET_*
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*/
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uint32_t binding;
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/** The descriptor set this surface corresponds to.
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*
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* The special ANV_DESCRIPTOR_SET_* values above indicates that this
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@@ -1967,11 +1974,6 @@ struct anv_pipeline_binding {
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/** For a storage image, whether it requires a lowered surface */
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uint8_t lowered_storage_surface;
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/** Pad to 64 bits so that there are no holes and we can safely memcmp
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* assuming POD zero-initialization.
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*/
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uint8_t pad;
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};
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struct anv_push_range {
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@@ -2004,6 +2006,10 @@ struct anv_pipeline_layout {
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unsigned char sha1[20];
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};
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const struct anv_descriptor_set_layout *
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anv_pipeline_layout_get_push_set(const struct anv_pipeline_layout *layout,
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uint8_t *desc_idx);
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struct anv_buffer {
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struct vk_buffer vk;
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@@ -2849,6 +2855,17 @@ struct anv_pipeline_bind_map {
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struct anv_push_range push_ranges[4];
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};
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struct anv_push_descriptor_info {
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/* A bitfield of descriptors used. */
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uint32_t used_descriptors;
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/* A bitfield of UBOs bindings fully promoted to push constants. */
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uint32_t fully_promoted_ubo_descriptors;
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/* */
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uint8_t used_set_buffer;
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};
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struct anv_shader_bin {
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struct vk_pipeline_cache_object base;
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@@ -2865,6 +2882,8 @@ struct anv_shader_bin {
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struct nir_xfb_info *xfb_info;
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struct anv_push_descriptor_info push_desc_info;
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struct anv_pipeline_bind_map bind_map;
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};
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@@ -2877,7 +2896,8 @@ anv_shader_bin_create(struct anv_device *device,
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uint32_t prog_data_size,
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const struct brw_compile_stats *stats, uint32_t num_stats,
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const struct nir_xfb_info *xfb_info,
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const struct anv_pipeline_bind_map *bind_map);
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const struct anv_pipeline_bind_map *bind_map,
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const struct anv_push_descriptor_info *push_desc_info);
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static inline void
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anv_shader_bin_ref(struct anv_shader_bin *shader)
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@@ -2935,6 +2955,16 @@ struct anv_pipeline {
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uint32_t ray_queries;
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/**
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* Mask of stages that are accessing push descriptors.
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*/
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VkShaderStageFlags use_push_descriptor;
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/**
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* Mask of stages that are accessing the push descriptors buffer.
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*/
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VkShaderStageFlags use_push_descriptor_buffer;
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struct util_dynarray executables;
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const struct intel_l3_config * l3_config;
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