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gallium/swr: Fix llvm11 compilation issues

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Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
This commit is contained in:
Krzysztof Raszkowski
2020-02-07 15:02:25 +01:00
parent f239bb8020
commit ff8265b64f
5 changed files with 34 additions and 12 deletions
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10
src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py
View File

@@ -98,17 +98,26 @@ def parse_ir_builder(input_file):
functions = []
lines = input_file.readlines()
deprecated = None
idx = 0
while idx < len(lines) - 1:
line = lines[idx].rstrip()
idx += 1
if deprecated is None:
deprecated = re.search(r'LLVM_ATTRIBUTE_DEPRECATED', line)
#match = re.search(r'\*Create', line)
match = re.search(r'[\*\s]Create(\w*)\(', line)
if match is not None:
#print('Line: %s' % match.group(1))
# Skip function if LLVM_ATTRIBUTE_DEPRECATED found before
if deprecated is not None:
deprecated = None
continue
if re.search(r'^\s*Create', line) is not None:
func_sig = lines[idx-2].rstrip() + line
else:
@@ -168,6 +177,7 @@ def parse_ir_builder(input_file):
func_name == 'CreateMaskedLoad' or
func_name == 'CreateStore' or
func_name == 'CreateMaskedStore' or
func_name == 'CreateFCmpHelper' or
func_name == 'CreateElementUnorderedAtomicMemCpy'):
ignore = True

4
src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
View File

@@ -234,12 +234,12 @@ namespace SwrJit
/// @param pVecPassthru - SIMD wide vector of values to load when lane is inactive
Value* Builder::GATHER_PTR(Value* pVecSrcPtr, Value* pVecMask, Value* pVecPassthru)
{
return MASKED_GATHER(pVecSrcPtr, 4, pVecMask, pVecPassthru);
return MASKED_GATHER(pVecSrcPtr, AlignType(4), pVecMask, pVecPassthru);
}
void Builder::SCATTER_PTR(Value* pVecDstPtr, Value* pVecSrc, Value* pVecMask)
{
MASKED_SCATTER(pVecSrc, pVecDstPtr, 4, pVecMask);
MASKED_SCATTER(pVecSrc, pVecDstPtr, AlignType(4), pVecMask);
}
void Builder::Gather4(const SWR_FORMAT format,

4
src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
View File

@@ -84,7 +84,7 @@ virtual CallInst* MASKED_LOAD(Value* Ptr,
Type* Ty = nullptr,
MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL)
{
return IRB()->CreateMaskedLoad(Ptr, Align, Mask, PassThru, Name);
return IRB()->CreateMaskedLoad(Ptr, AlignType(Align), Mask, PassThru, Name);
}
virtual StoreInst* STORE(Value *Val, Value *Ptr, bool isVolatile = false, Type* Ty = nullptr, MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL)
@@ -96,7 +96,7 @@ virtual StoreInst* STORE(Value* Val, Value* BasePtr, const std::initializer_list
virtual CallInst* MASKED_STORE(Value *Val, Value *Ptr, unsigned Align, Value *Mask, Type* Ty = nullptr, MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL)
{
return IRB()->CreateMaskedStore(Val, Ptr, Align, Mask);
return IRB()->CreateMaskedStore(Val, Ptr, AlignType(Align), Mask);
}
LoadInst* LOADV(Value* BasePtr, const std::initializer_list<Value*>& offset, const llvm::Twine& name = "");

6
src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h
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@@ -29,6 +29,12 @@
******************************************************************************/
#pragma once
#if LLVM_VERSION_MAJOR > 10
typedef llvm::Align AlignType;
#else
typedef unsigned AlignType;
#endif
Constant* C(bool i);
Constant* C(char i);
Constant* C(uint8_t i);

22
src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
View File

@@ -48,6 +48,12 @@ namespace SwrJit
{
using namespace llvm;
#if LLVM_VERSION_MAJOR > 10
typedef unsigned IntrinsicID;
#else
typedef Intrinsic::ID IntrinsicID;
#endif
enum TargetArch
{
AVX = 0,
@@ -68,13 +74,13 @@ namespace SwrJit
struct X86Intrinsic
{
Intrinsic::ID intrin[NUM_WIDTHS];
IntrinsicID intrin[NUM_WIDTHS];
EmuFunc emuFunc;
};
// Map of intrinsics that haven't been moved to the new mechanism yet. If used, these get the
// previous behavior of mapping directly to avx/avx2 intrinsics.
static std::map<std::string, Intrinsic::ID> intrinsicMap = {
static std::map<std::string, IntrinsicID> intrinsicMap = {
{"meta.intrinsic.BEXTR_32", Intrinsic::x86_bmi_bextr_32},
{"meta.intrinsic.VPSHUFB", Intrinsic::x86_avx2_pshuf_b},
{"meta.intrinsic.VCVTPS2PH", Intrinsic::x86_vcvtps2ph_256},
@@ -313,13 +319,13 @@ namespace SwrJit
Function* pFunc = pCallInst->getCalledFunction();
assert(pFunc);
auto& intrinsic = intrinsicMap2[mTarget][pFunc->getName()];
auto& intrinsic = intrinsicMap2[mTarget][pFunc->getName().str()];
TargetWidth vecWidth;
Type* pElemTy;
GetRequestedWidthAndType(pCallInst, pFunc->getName(), &vecWidth, &pElemTy);
// Check if there is a native intrinsic for this instruction
Intrinsic::ID id = intrinsic.intrin[vecWidth];
IntrinsicID id = intrinsic.intrin[vecWidth];
if (id == DOUBLE)
{
// Double pump the next smaller SIMD intrinsic
@@ -375,16 +381,16 @@ namespace SwrJit
assert(pFunc);
// Forward to the advanced support if found
if (intrinsicMap2[mTarget].find(pFunc->getName()) != intrinsicMap2[mTarget].end())
if (intrinsicMap2[mTarget].find(pFunc->getName().str()) != intrinsicMap2[mTarget].end())
{
return ProcessIntrinsicAdvanced(pCallInst);
}
SWR_ASSERT(intrinsicMap.find(pFunc->getName()) != intrinsicMap.end(),
SWR_ASSERT(intrinsicMap.find(pFunc->getName().str()) != intrinsicMap.end(),
"Unimplemented intrinsic %s.",
pFunc->getName());
pFunc->getName().str());
Intrinsic::ID x86Intrinsic = intrinsicMap[pFunc->getName()];
Intrinsic::ID x86Intrinsic = intrinsicMap[pFunc->getName().str()];
Function* pX86IntrinFunc =
Intrinsic::getDeclaration(B->JM()->mpCurrentModule, x86Intrinsic);