freedreno/regs: Document a7xx CP_BV_BR_COUNT_OPS
Fully tested on HW. Credits to Connor Abbott for finding out how it works. Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
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@@ -626,7 +626,8 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
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<value name="CP_THREAD_CONTROL" value="0x17" variants="A7XX-"/>
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<!-- payload 4 dwords, last two could be render target addr (one pkt per MRT), possibly used for GMEM save/restore?-->
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<value name="CP_RESOURCE_LIST" value="0x18" variants="A7XX-"/>
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<value name="CP_BV_BR_COUNT_OPS" value="0x1b" variants="A7XX-"/> <!-- payload 1 or 2 dwords -->
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<doc> Can clear BV/BR counters, or wait until one catches up to another </doc>
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<value name="CP_BV_BR_COUNT_OPS" value="0x1b" variants="A7XX-"/>
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<doc> Clears, adds to local, or adds to global timestamp </doc>
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<value name="CP_MODIFY_TIMESTAMP" value="0x1c" variants="A7XX-"/>
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<!-- similar to CP_CONTEXT_REG_BUNCH, but discards first two dwords?? -->
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@@ -2159,6 +2160,23 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
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<reg32 offset="4" name="SRC_1"/>
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</domain>
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<domain name="CP_BV_BR_COUNT_OPS" width="32">
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<enum name="pipe_count_op">
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<value name="PIPE_CLEAR_BV_BR" value="0x1"/>
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<value name="PIPE_SET_BR_OFFSET" value="0x2"/>
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<!-- Wait until for BV_counter > BR_counter -->
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<value name="PIPE_BR_WAIT_FOR_BV" value="0x3"/>
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<!-- Wait until (BR_counter + BR_OFFSET) > BV_counter -->
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<value name="PIPE_BV_WAIT_FOR_BR" value="0x4"/>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="OP" low="0" high="3" type="pipe_count_op"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="BR_OFFSET" low="0" high="15" type="uint"/>
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</reg32>
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</domain>
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<domain name="CP_MODIFY_TIMESTAMP" width="32">
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<enum name="timestamp_op">
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<value name="MODIFY_TIMESTAMP_CLEAR" value="0"/>
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