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freedreno/ir3: use nir_src_as_uint in a few places

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v2 (Jason Ekstrand):
 - Add even more places

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Karol Herbst
2019-03-29 20:57:52 +01:00
parent bbf2ecaf35
commit fe8c57e859
5 changed files with 20 additions and 51 deletions
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18
src/freedreno/ir3/ir3_a4xx.c
View File

@@ -41,13 +41,9 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
{
struct ir3_block *b = ctx->block;
struct ir3_instruction *ldgb, *src0, *src1, *byte_offset, *offset;
nir_const_value *const_offset;
/* can this be non-const buffer_index? how do we handle that? */
const_offset = nir_src_as_const_value(intr->src[0]);
compile_assert(ctx, const_offset);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, const_offset->u32[0]);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, nir_src_as_uint(intr->src[0]));
byte_offset = ir3_get_src(ctx, &intr->src[1])[0];
offset = ir3_get_src(ctx, &intr->src[2])[0];
@@ -77,7 +73,6 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_instruction *stgb, *src0, *src1, *src2, *byte_offset, *offset;
nir_const_value *const_offset;
/* TODO handle wrmask properly, see _store_shared().. but I think
* it is more a PITA than that, since blob ends up loading the
* masked components and writing them back out.
@@ -86,10 +81,7 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
unsigned ncomp = ffs(~wrmask) - 1;
/* can this be non-const buffer_index? how do we handle that? */
const_offset = nir_src_as_const_value(intr->src[1]);
compile_assert(ctx, const_offset);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, const_offset->u32[0]);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, nir_src_as_uint(intr->src[1]));
byte_offset = ir3_get_src(ctx, &intr->src[2])[0];
offset = ir3_get_src(ctx, &intr->src[3])[0];
@@ -137,14 +129,10 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
struct ir3_block *b = ctx->block;
struct ir3_instruction *atomic, *ssbo, *src0, *src1, *src2, *byte_offset,
*offset;
nir_const_value *const_offset;
type_t type = TYPE_U32;
/* can this be non-const buffer_index? how do we handle that? */
const_offset = nir_src_as_const_value(intr->src[0]);
compile_assert(ctx, const_offset);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, const_offset->u32[0]);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, nir_src_as_uint(intr->src[0]));
ssbo = create_immed(b, ibo_idx);
byte_offset = ir3_get_src(ctx, &intr->src[1])[0];

18
src/freedreno/ir3/ir3_a6xx.c
View File

@@ -46,13 +46,9 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_block *b = ctx->block;
struct ir3_instruction *offset;
struct ir3_instruction *ldib;
nir_const_value *buffer_index;
/* can this be non-const buffer_index? how do we handle that? */
buffer_index = nir_src_as_const_value(intr->src[0]);
compile_assert(ctx, buffer_index);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, buffer_index->u32[0]);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, nir_src_as_uint(intr->src[0]));
offset = ir3_get_src(ctx, &intr->src[2])[0];
@@ -73,7 +69,6 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_instruction *stib, *val, *offset;
nir_const_value *buffer_index;
/* TODO handle wrmask properly, see _store_shared().. but I think
* it is more a PITA than that, since blob ends up loading the
* masked components and writing them back out.
@@ -82,10 +77,7 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
unsigned ncomp = ffs(~wrmask) - 1;
/* can this be non-const buffer_index? how do we handle that? */
buffer_index = nir_src_as_const_value(intr->src[1]);
compile_assert(ctx, buffer_index);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, buffer_index->u32[0]);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, nir_src_as_uint(intr->src[1]));
/* src0 is offset, src1 is value:
*/
@@ -124,14 +116,10 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_instruction *atomic, *ibo, *src0, *src1, *data, *dummy;
nir_const_value *buffer_index;
type_t type = TYPE_U32;
/* can this be non-const buffer_index? how do we handle that? */
buffer_index = nir_src_as_const_value(intr->src[0]);
compile_assert(ctx, buffer_index);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, buffer_index->u32[0]);
int ibo_idx = ir3_ssbo_to_ibo(&ctx->so->image_mapping, nir_src_as_uint(intr->src[0]));
ibo = create_immed(b, ibo_idx);
data = ir3_get_src(ctx, &intr->src[2])[0];

29
src/freedreno/ir3/ir3_compiler_nir.c
View File

@@ -680,7 +680,6 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
{
struct ir3_block *b = ctx->block;
struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1;
nir_const_value *const_offset;
/* UBO addresses are the first driver params, but subtract 2 here to
* account for nir_lower_uniforms_to_ubo rebasing the UBOs such that UBO 0
* is the uniforms: */
@@ -703,9 +702,8 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
/* note: on 32bit gpu's base_hi is ignored and DCE'd */
addr = base_lo;
const_offset = nir_src_as_const_value(intr->src[1]);
if (const_offset) {
off += const_offset->u32[0];
if (nir_src_is_const(intr->src[1])) {
off += nir_src_as_uint(intr->src[1]);
} else {
/* For load_ubo_indirect, second src is indirect offset: */
src1 = ir3_get_src(ctx, &intr->src[1])[0];
@@ -753,7 +751,7 @@ emit_intrinsic_ssbo_size(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
/* SSBO size stored as a const starting at ssbo_sizes: */
unsigned blk_idx = nir_src_as_const_value(intr->src[0])->u32[0];
unsigned blk_idx = nir_src_as_uint(intr->src[0]);
unsigned idx = regid(ctx->so->constbase.ssbo_sizes, 0) +
ctx->so->const_layout.ssbo_size.off[blk_idx];
@@ -1136,7 +1134,6 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
struct ir3_instruction **dst;
struct ir3_instruction * const *src;
struct ir3_block *b = ctx->block;
nir_const_value *const_offset;
int idx, comp;
if (info->has_dest) {
@@ -1149,9 +1146,8 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
switch (intr->intrinsic) {
case nir_intrinsic_load_uniform:
idx = nir_intrinsic_base(intr);
const_offset = nir_src_as_const_value(intr->src[0]);
if (const_offset) {
idx += const_offset->u32[0];
if (nir_src_is_const(intr->src[0])) {
idx += nir_src_as_uint(intr->src[0]);
for (int i = 0; i < intr->num_components; i++) {
dst[i] = create_uniform(b, idx + i);
}
@@ -1180,10 +1176,9 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
idx = nir_intrinsic_base(intr);
comp = nir_intrinsic_component(intr);
src = ir3_get_src(ctx, &intr->src[0]);
const_offset = nir_src_as_const_value(intr->src[1]);
if (const_offset) {
if (nir_src_is_const(intr->src[1])) {
struct ir3_instruction *coord = ir3_create_collect(ctx, src, 2);
idx += const_offset->u32[0];
idx += nir_src_as_uint(intr->src[1]);
for (int i = 0; i < intr->num_components; i++) {
unsigned inloc = idx * 4 + i + comp;
if (ctx->so->inputs[idx * 4].bary) {
@@ -1203,9 +1198,8 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
case nir_intrinsic_load_input:
idx = nir_intrinsic_base(intr);
comp = nir_intrinsic_component(intr);
const_offset = nir_src_as_const_value(intr->src[0]);
if (const_offset) {
idx += const_offset->u32[0];
if (nir_src_is_const(intr->src[0])) {
idx += nir_src_as_uint(intr->src[0]);
for (int i = 0; i < intr->num_components; i++) {
unsigned n = idx * 4 + i + comp;
dst[i] = ctx->ir->inputs[n];
@@ -1311,9 +1305,8 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
case nir_intrinsic_store_output:
idx = nir_intrinsic_base(intr);
comp = nir_intrinsic_component(intr);
const_offset = nir_src_as_const_value(intr->src[1]);
compile_assert(ctx, const_offset != NULL);
idx += const_offset->u32[0];
compile_assert(ctx, nir_src_is_const(intr->src[1]));
idx += nir_src_as_uint(intr->src[1]);
src = ir3_get_src(ctx, &intr->src[0]);
for (int i = 0; i < intr->num_components; i++) {

4
src/freedreno/ir3/ir3_image.c
View File

@@ -95,7 +95,7 @@ ir3_get_image_slot(nir_deref_instr *deref)
while (deref->deref_type != nir_deref_type_var) {
assert(deref->deref_type == nir_deref_type_array);
nir_const_value *const_index = nir_src_as_const_value(deref->arr.index);
unsigned const_index = nir_src_as_uint(deref->arr.index);
assert(const_index);
/* Go to the next instruction */
@@ -103,7 +103,7 @@ ir3_get_image_slot(nir_deref_instr *deref)
assert(glsl_type_is_array(deref->type));
const unsigned array_len = glsl_get_length(deref->type);
loc += MIN2(const_index->u32[0], array_len - 1) * inner_size;
loc += MIN2(const_index, array_len - 1) * inner_size;
/* Update the inner size */
inner_size *= array_len;

2
src/freedreno/ir3/ir3_nir.c
View File

@@ -268,7 +268,7 @@ ir3_nir_scan_driver_consts(nir_shader *shader,
switch (intr->intrinsic) {
case nir_intrinsic_get_buffer_size:
idx = nir_src_as_const_value(intr->src[0])->u32[0];
idx = nir_src_as_uint(intr->src[0]);
if (layout->ssbo_size.mask & (1 << idx))
break;
layout->ssbo_size.mask |= (1 << idx);