radeonsi/gfx11: fix alpha-to-coverage with stencil or samplemask export

We can't use UINT16_ABGR for the alpha channel. Always use 32_ABGR.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
This commit is contained in:
Marek Olšák
2022-05-13 22:34:17 -04:00
committed by Marge Bot
parent ba02ed91a6
commit fcaa9f5096
6 changed files with 18 additions and 22 deletions

View File

@@ -4290,11 +4290,12 @@ LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func, LLVMV
}
void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueRef stencil,
LLVMValueRef samplemask, LLVMValueRef mrtz_alpha, bool is_last,
LLVMValueRef samplemask, LLVMValueRef mrt0_alpha, bool is_last,
struct ac_export_args *args)
{
unsigned mask = 0;
unsigned format = ac_get_spi_shader_z_format(depth != NULL, stencil != NULL, samplemask != NULL);
unsigned format = ac_get_spi_shader_z_format(depth != NULL, stencil != NULL, samplemask != NULL,
mrt0_alpha != NULL);
assert(depth || stencil || samplemask);
@@ -4330,17 +4331,6 @@ void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueR
args->out[1] = samplemask;
mask |= ctx->gfx_level >= GFX11 ? 0x2 : 0xc;
}
if (mrtz_alpha) {
/* MRT0 alpha should be in Y[31:16] if alpha-to-coverage is enabled and MRTZ is present. */
assert(ctx->gfx_level >= GFX11);
mrtz_alpha = LLVMBuildFPTrunc(ctx->builder, mrtz_alpha, ctx->f16, "");
mrtz_alpha = ac_to_integer(ctx, mrtz_alpha);
mrtz_alpha = LLVMBuildZExt(ctx->builder, mrtz_alpha, ctx->i32, "");
mrtz_alpha = LLVMBuildShl(ctx->builder, mrtz_alpha, LLVMConstInt(ctx->i32, 16, 0), "");
args->out[1] = LLVMBuildOr(ctx->builder, ac_to_integer(ctx, args->out[1]), mrtz_alpha, "");
args->out[1] = ac_to_float(ctx, args->out[1]);
mask |= 0x2;
}
} else {
if (depth) {
args->out[0] = depth;
@@ -4354,8 +4344,8 @@ void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueR
args->out[2] = samplemask;
mask |= 0x4;
}
if (mrtz_alpha) {
args->out[3] = mrtz_alpha;
if (mrt0_alpha) {
args->out[3] = mrt0_alpha;
mask |= 0x8;
}
}