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anv: dynamic color write mask

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This affects following packets:

  3DSTATE_BLEND_STATE_POINTERS

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
This commit is contained in:
Tapani Pälli
2022-09-04 19:32:15 +03:00
committed by Marge Bot
parent 0b75376e4d
commit fc3fd7c69e
3 changed files with 7 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/intel/vulkan/anv_pipeline.c
View File

@@ -2302,14 +2302,6 @@ anv_graphics_pipeline_init(struct anv_graphics_pipeline *pipeline,
pipeline->patch_control_points =
state->ts != NULL ? state->ts->patch_control_points : 0;
/* Store the color write masks, to be merged with color write enable if
* dynamic.
*/
if (state->cb != NULL) {
for (unsigned i = 0; i < state->cb->attachment_count; i++)
pipeline->color_comp_writes[i] = state->cb->attachments[i].write_mask;
}
return VK_SUCCESS;
}

4
src/intel/vulkan/anv_private.h
View File

@@ -2954,8 +2954,6 @@ struct anv_graphics_pipeline {
uint32_t patch_control_points;
uint32_t rasterization_samples;
VkColorComponentFlags color_comp_writes[MAX_RTS];
uint32_t view_mask;
uint32_t instance_multiplier;
@@ -3072,7 +3070,7 @@ anv_cmd_buffer_all_color_write_masked(const struct anv_cmd_buffer *cmd_buffer)
/* Or all write masks are empty */
for (uint32_t i = 0; i < state->color_att_count; i++) {
if (state->pipeline->color_comp_writes[i] != 0)
if (dyn->cb.attachments[i].write_mask != 0)
return false;
}

11
src/intel/vulkan/gfx8_cmd_buffer.c
View File

@@ -532,7 +532,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP_ENABLE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_ALPHA_TO_ONE_ENABLE)) {
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_ALPHA_TO_ONE_ENABLE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES)) {
const uint8_t color_writes = dyn->cb.color_write_enables;
const struct anv_cmd_graphics_state *state = &cmd_buffer->state.gfx;
bool has_writeable_rt =
@@ -572,16 +573,16 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
(color_writes & BITFIELD_BIT(i)) == 0;
struct GENX(BLEND_STATE_ENTRY) entry = {
.WriteDisableAlpha = write_disabled ||
(pipeline->color_comp_writes[i] &
(dyn->cb.attachments[i].write_mask &
VK_COLOR_COMPONENT_A_BIT) == 0,
.WriteDisableRed = write_disabled ||
(pipeline->color_comp_writes[i] &
(dyn->cb.attachments[i].write_mask &
VK_COLOR_COMPONENT_R_BIT) == 0,
.WriteDisableGreen = write_disabled ||
(pipeline->color_comp_writes[i] &
(dyn->cb.attachments[i].write_mask &
VK_COLOR_COMPONENT_G_BIT) == 0,
.WriteDisableBlue = write_disabled ||
(pipeline->color_comp_writes[i] &
(dyn->cb.attachments[i].write_mask &
VK_COLOR_COMPONENT_B_BIT) == 0,
.LogicOpFunction = genX(vk_to_intel_logic_op)[dyn->cb.logic_op],
.LogicOpEnable = dyn->cb.logic_op_enable,