OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

radv: rework the number of tess patches computation

Browse Source 
This uses the same helper as RadeonSI which seems more robust and more
optimal (eg. it reduces the number of patches to increase occupancy).

fossils-db (NAVI21):
Totals from 638 (0.80% of 79395) affected shaders:
MaxWaves: 13182 -> 13142 (-0.30%)
Instrs: 419446 -> 419322 (-0.03%); split: -0.08%, +0.05%
CodeSize: 2261408 -> 2261200 (-0.01%); split: -0.06%, +0.05%
VGPRs: 32560 -> 32600 (+0.12%)
LDS: 4648960 -> 5343232 (+14.93%); split: -1.67%, +16.61%
Latency: 4812105 -> 4811141 (-0.02%); split: -0.04%, +0.02%
InvThroughput: 1159924 -> 1153998 (-0.51%); split: -0.60%, +0.09%
VClause: 7837 -> 7871 (+0.43%); split: -0.36%, +0.79%
SClause: 9378 -> 9381 (+0.03%); split: -0.21%, +0.25%
Copies: 28451 -> 28211 (-0.84%); split: -0.97%, +0.13%
PreVGPRs: 25404 -> 25411 (+0.03%); split: -0.06%, +0.09%
VALU: 278086 -> 277975 (-0.04%); split: -0.11%, +0.07%
SALU: 43657 -> 43617 (-0.09%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28015>
This commit is contained in:
Samuel Pitoiset
2024-03-06 14:38:35 +01:00
committed by Marge Bot
parent 758e6d9005
commit fb323ae46b
4 changed files with 58 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/amd/vulkan/radv_shader_info.c
View File

@@ -564,17 +564,15 @@ gather_shader_info_tcs(struct radv_device *device, const nir_shader *nir,
if (gfx_state->ts.patch_control_points) {
/* Number of tessellation patches per workgroup processed by the current pipeline. */
info->num_tess_patches = get_tcs_num_patches(
gfx_state->ts.patch_control_points, nir->info.tess.tcs_vertices_out, info->tcs.num_linked_inputs,
info->num_tess_patches = radv_get_tcs_num_patches(
pdev, gfx_state->ts.patch_control_points, nir->info.tess.tcs_vertices_out, info->tcs.num_linked_inputs,
info->tcs.num_lds_per_vertex_outputs, info->tcs.num_lds_per_patch_outputs, info->tcs.num_linked_outputs,
info->tcs.num_linked_patch_outputs, pdev->hs.tess_offchip_block_dw_size, pdev->info.gfx_level,
pdev->info.family);
info->tcs.num_linked_patch_outputs);
/* LDS size used by VS+TCS for storing TCS inputs and outputs. */
info->tcs.num_lds_blocks =
calculate_tess_lds_size(pdev->info.gfx_level, gfx_state->ts.patch_control_points,
nir->info.tess.tcs_vertices_out, info->tcs.num_linked_inputs, info->num_tess_patches,
info->tcs.num_lds_per_vertex_outputs, info->tcs.num_lds_per_patch_outputs);
info->tcs.num_lds_blocks = radv_get_tess_lds_size(
pdev, gfx_state->ts.patch_control_points, nir->info.tess.tcs_vertices_out, info->tcs.num_linked_inputs,
info->num_tess_patches, info->tcs.num_lds_per_vertex_outputs, info->tcs.num_lds_per_patch_outputs);
}
}