nir/lower_tex: support projector lowering per sampler type

Some hardware, such as adreno a3xx, supports txp on some but not all
sampler types.  In this case we want more fine grained control over
which texture projectors get lowered.

v2: split out nir_lower_tex_options struct to make it easier to
add the additional parameters coming in the following patches

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

src/glsl/nir/nir.h

@@ -1836,7 +1836,18 @@ void nir_lower_samplers(nir_shader *shader,
                         const struct gl_shader_program *shader_program);
 
 void nir_lower_system_values(nir_shader *shader);
-void nir_lower_tex(nir_shader *shader);
+
+typedef struct nir_lower_tex_options {
+   /**
+    * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
+    * sampler types a texture projector is lowered.
+    */
+   unsigned lower_txp;
+} nir_lower_tex_options;
+
+void nir_lower_tex(nir_shader *shader,
+                   const nir_lower_tex_options *options);
+
 void nir_lower_idiv(nir_shader *shader);
 
 void nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables);

src/glsl/nir/nir_lower_tex.c

@@ -30,6 +30,11 @@
 #include "nir.h"
 #include "nir_builder.h"
 
+typedef struct {
+   nir_builder b;
+   const nir_lower_tex_options *options;
+} lower_tex_state;
+
 static void
 project_src(nir_builder *b, nir_tex_instr *tex)
 {
@@ -109,37 +114,42 @@ project_src(nir_builder *b, nir_tex_instr *tex)
 static bool
 nir_lower_tex_block(nir_block *block, void *void_state)
 {
-   nir_builder *b = void_state;
+   lower_tex_state *state = void_state;
+   nir_builder *b = &state->b;
 
    nir_foreach_instr_safe(block, instr) {
       if (instr->type != nir_instr_type_tex)
          continue;
 
       nir_tex_instr *tex = nir_instr_as_tex(instr);
+      bool lower_txp = !!(state->options->lower_txp & (1 << tex->sampler_dim));
+
+      if (lower_txp)
+         project_src(b, tex);
 
-      project_src(b, tex);
    }
 
    return true;
 }
 
 static void
-nir_lower_tex_impl(nir_function_impl *impl)
+nir_lower_tex_impl(nir_function_impl *impl, lower_tex_state *state)
 {
-   nir_builder b;
-   nir_builder_init(&b, impl);
+   nir_builder_init(&state->b, impl);
 
-   nir_foreach_block(impl, nir_lower_tex_block, &b);
+   nir_foreach_block(impl, nir_lower_tex_block, state);
 
    nir_metadata_preserve(impl, nir_metadata_block_index |
                                nir_metadata_dominance);
 }
 
 void
-nir_lower_tex(nir_shader *shader)
+nir_lower_tex(nir_shader *shader, const nir_lower_tex_options *options)
 {
+   lower_tex_state state;
+   state.options = options;
    nir_foreach_overload(shader, overload) {
       if (overload->impl)
-         nir_lower_tex_impl(overload->impl);
+         nir_lower_tex_impl(overload->impl, &state);
    }
 }

src/mesa/drivers/dri/i965/brw_nir.c

@@ -80,6 +80,9 @@ brw_create_nir(struct brw_context *brw,
    struct gl_context *ctx = &brw->ctx;
    const nir_shader_compiler_options *options =
       ctx->Const.ShaderCompilerOptions[stage].NirOptions;
+   static const nir_lower_tex_options tex_options = {
+      .lower_txp = ~0,
+   };
    struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
    bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
    nir_shader *nir;
@@ -96,7 +99,7 @@ brw_create_nir(struct brw_context *brw,
    nir_lower_global_vars_to_local(nir);
    nir_validate_shader(nir);
 
-   nir_lower_tex(nir);
+   nir_lower_tex(nir, &tex_options);
    nir_validate_shader(nir);
 
    nir_normalize_cubemap_coords(nir);