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i965: Add uniform for a CS thread local base ID

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v4:
 * Force thread_local_id_index to -1 for now, and have
   fs_visitor::setup_cs_payload look at thread_local_id_index. This
   enables us to more easily cut over from the old local ID layout to
   the new layout, as suggested by Jason.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Jordan Justen
2016-05-28 23:45:21 -07:00
parent 8f48d23e0f
commit fa279dfbf0
4 changed files with 25 additions and 1 deletions
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4
src/intel/vulkan/anv_pipeline.c
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@@ -338,6 +338,10 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
pipeline->needs_data_cache = true; pipeline->needs_data_cache = true;
} }
if (stage == MESA_SHADER_COMPUTE)
((struct brw_cs_prog_data *)prog_data)->thread_local_id_index =
prog_data->nr_params++; /* The CS Thread ID uniform */
if (nir->info.num_ssbos > 0) if (nir->info.num_ssbos > 0)
pipeline->needs_data_cache = true; pipeline->needs_data_cache = true;

1
src/mesa/drivers/dri/i965/brw_compiler.h
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@@ -433,6 +433,7 @@ struct brw_cs_prog_data {
bool uses_barrier; bool uses_barrier;
bool uses_num_work_groups; bool uses_num_work_groups;
unsigned local_invocation_id_regs; unsigned local_invocation_id_regs;
int thread_local_id_index;
struct { struct {
/** @{ /** @{

3
src/mesa/drivers/dri/i965/brw_cs.c
View File

@@ -93,6 +93,9 @@ brw_codegen_cs_prog(struct brw_context *brw,
*/ */
int param_count = cp->program.Base.nir->num_uniforms / 4; int param_count = cp->program.Base.nir->num_uniforms / 4;
/* The backend also sometimes add a param for the thread local id. */
prog_data.thread_local_id_index = param_count++;
/* The backend also sometimes adds params for texture size. */ /* The backend also sometimes adds params for texture size. */
param_count += 2 * ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits; param_count += 2 * ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits;
prog_data.base.param = prog_data.base.param =

18
src/mesa/drivers/dri/i965/brw_fs.cpp
View File

@@ -5629,7 +5629,8 @@ fs_visitor::setup_cs_payload()
payload.num_regs = 1; payload.num_regs = 1;
if (nir->info.system_values_read & SYSTEM_BIT_LOCAL_INVOCATION_ID) { if (nir->info.system_values_read & SYSTEM_BIT_LOCAL_INVOCATION_ID &&
prog_data->thread_local_id_index < 0) {
prog_data->local_invocation_id_regs = dispatch_width * 3 / 8; prog_data->local_invocation_id_regs = dispatch_width * 3 / 8;
payload.local_invocation_id_reg = payload.num_regs; payload.local_invocation_id_reg = payload.num_regs;
payload.num_regs += prog_data->local_invocation_id_regs; payload.num_regs += prog_data->local_invocation_id_regs;
@@ -6559,6 +6560,21 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
true); true);
brw_nir_lower_cs_shared(shader); brw_nir_lower_cs_shared(shader);
prog_data->base.total_shared += shader->num_shared; prog_data->base.total_shared += shader->num_shared;
/* The driver isn't yet ready to support thread_local_id_index, so we force
* it to disabled for now.
*/
prog_data->thread_local_id_index = -1;
/* Now that we cloned the nir_shader, we can update num_uniforms based on
* the thread_local_id_index.
*/
if (prog_data->thread_local_id_index >= 0) {
shader->num_uniforms =
MAX2(shader->num_uniforms,
(unsigned)4 * (prog_data->thread_local_id_index + 1));
}
shader = brw_postprocess_nir(shader, compiler->devinfo, true); shader = brw_postprocess_nir(shader, compiler->devinfo, true);
prog_data->local_size[0] = shader->info.cs.local_size[0]; prog_data->local_size[0] = shader->info.cs.local_size[0];