intel/nir/rt: change scratch check validation
It's very unfortunate that we have the RT scratch being conflated with
the usual scratch. In our implementation those are 2 different buffers.
The usual scratch access are done through the scratch surface state
(delivered through thread payload), while RT scratch (which outlives
thread dispatch with shader calls) is its own buffer.
So checking the NIR scratch size makes no sense as we can have normal
scratch accesses completely unrelated to RT scratch accesses.
This change switches the validation by looking at whether the scratch
base pointer intrinsic is being used (which is what we use/abuse to
implement RT scratch).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c78be5da30
("intel/fs: lower ray query intrinsics")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17396>
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f7fab09a07
@@ -25,6 +25,28 @@
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#include "brw_nir_rt_builder.h"
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#include "nir_phi_builder.h"
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UNUSED static bool
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no_load_scratch_base_ptr_intrinsic(nir_shader *shader)
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{
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nir_foreach_function(func, shader) {
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if (!func->impl)
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continue;
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nir_foreach_block(block, func->impl) {
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nir_foreach_instr(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic == nir_intrinsic_load_scratch_base_ptr)
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return false;
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}
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}
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}
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return true;
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}
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/** Insert the appropriate return instruction at the end of the shader */
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void
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brw_nir_lower_shader_returns(nir_shader *shader)
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@@ -46,7 +68,7 @@ brw_nir_lower_shader_returns(nir_shader *shader)
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* This isn't needed for ray-gen shaders because they end the thread and
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* never return to the calling trampoline shader.
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*/
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assert(shader->scratch_size == 0);
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assert(no_load_scratch_base_ptr_intrinsic(shader));
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if (shader->info.stage != MESA_SHADER_RAYGEN)
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shader->scratch_size = BRW_BTD_STACK_CALLEE_DATA_SIZE;
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