intel/fs: Use canonical form for "work around" tags
Trivial. Also clean up some weird whitespace. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
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@@ -944,7 +944,7 @@ fs_visitor::emit_urb_writes(const fs_reg &gs_vertex_count)
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fs_inst *inst = abld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef,
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fs_inst *inst = abld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL, reg_undef,
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srcs, ARRAY_SIZE(srcs));
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srcs, ARRAY_SIZE(srcs));
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/* For ICL WA 1805992985 one needs additional write in the end. */
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/* For ICL Wa_1805992985 one needs additional write in the end. */
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if (devinfo->ver == 11 && stage == MESA_SHADER_TESS_EVAL)
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if (devinfo->ver == 11 && stage == MESA_SHADER_TESS_EVAL)
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inst->eot = false;
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inst->eot = false;
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else
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else
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@@ -992,9 +992,9 @@ fs_visitor::emit_urb_writes(const fs_reg &gs_vertex_count)
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inst->mlen = 2;
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inst->mlen = 2;
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inst->offset = 1;
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inst->offset = 1;
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return;
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return;
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}
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}
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/* ICL WA 1805992985:
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/* ICL Wa_1805992985:
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*
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*
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* ICLLP GPU hangs on one of tessellation vkcts tests with DS not done. The
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* ICLLP GPU hangs on one of tessellation vkcts tests with DS not done. The
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* send cycle, which is a urb write with an eot must be 4 phases long and
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* send cycle, which is a urb write with an eot must be 4 phases long and
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