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i915: Remove gen6+ batchbuffer support.

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While i915 does have hardware contexts in hardware, we don't expect there
to ever be SW support for it (given that support hasn't even made it back
to gen5 or gen4).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
2013-06-20 15:18:05 -07:00
committed by Kenneth Graunke
parent c25e3c34d6
commit f6426509dc
6 changed files with 25 additions and 91 deletions
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18
src/mesa/drivers/dri/i915/intel_batchbuffer.c
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@@ -59,7 +59,6 @@ intel_batchbuffer_reset(struct intel_context *intel)
intel->batch.reserved_space = BATCH_RESERVED;
intel->batch.state_batch_offset = intel->batch.bo->size;
intel->batch.used = 0;
intel->batch.needs_sol_reset = false;
}
void
@@ -127,20 +126,11 @@ do_flush_locked(struct intel_context *intel)
}
if (!intel->intelScreen->no_hw) {
int flags = I915_EXEC_RENDER;
if (batch->needs_sol_reset)
flags |= I915_EXEC_GEN7_SOL_RESET;
if (ret == 0) {
if (unlikely(INTEL_DEBUG & DEBUG_AUB) && intel->vtbl.annotate_aub)
intel->vtbl.annotate_aub(intel);
if (intel->hw_ctx == NULL || batch->is_blit) {
ret = drm_intel_bo_mrb_exec(batch->bo, 4 * batch->used, NULL, 0, 0,
flags);
} else {
ret = drm_intel_gem_bo_context_exec(batch->bo, intel->hw_ctx,
4 * batch->used, flags);
}
ret = drm_intel_bo_mrb_exec(batch->bo, 4 * batch->used, NULL, 0, 0,
I915_EXEC_RENDER);
}
}
@@ -259,10 +249,10 @@ intel_batchbuffer_emit_reloc_fenced(struct intel_context *intel,
void
intel_batchbuffer_data(struct intel_context *intel,
const void *data, GLuint bytes, bool is_blit)
const void *data, GLuint bytes)
{
assert((bytes & 3) == 0);
intel_batchbuffer_require_space(intel, bytes, is_blit);
intel_batchbuffer_require_space(intel, bytes);
__memcpy(intel->batch.map + intel->batch.used, data, bytes);
intel->batch.used += bytes >> 2;
}