intel/nir: Make brw_nir_apply_sampler_key more generic

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
This commit is contained in:
Jason Ekstrand
2019-02-22 11:15:21 -06:00
committed by Jason Ekstrand
parent 87cef718e1
commit f62227f2b7
7 changed files with 26 additions and 16 deletions

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@@ -7967,7 +7967,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
{ {
const struct gen_device_info *devinfo = compiler->devinfo; const struct gen_device_info *devinfo = compiler->devinfo;
brw_nir_apply_sampler_key(shader, compiler, &key->base.tex, true); brw_nir_apply_key(shader, compiler, &key->base, true);
brw_nir_lower_fs_inputs(shader, devinfo, key); brw_nir_lower_fs_inputs(shader, devinfo, key);
brw_nir_lower_fs_outputs(shader); brw_nir_lower_fs_outputs(shader);
@@ -8228,7 +8228,7 @@ compile_cs_to_nir(const struct brw_compiler *compiler,
unsigned dispatch_width) unsigned dispatch_width)
{ {
nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
brw_nir_apply_sampler_key(shader, compiler, &key->base.tex, true); brw_nir_apply_key(shader, compiler, &key->base, true);
NIR_PASS_V(shader, brw_nir_lower_cs_intrinsics, dispatch_width); NIR_PASS_V(shader, brw_nir_lower_cs_intrinsics, dispatch_width);

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@@ -919,11 +919,10 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
} }
} }
void static bool
brw_nir_apply_sampler_key(nir_shader *nir, brw_nir_apply_sampler_key(nir_shader *nir,
const struct brw_compiler *compiler, const struct brw_compiler *compiler,
const struct brw_sampler_prog_key_data *key_tex, const struct brw_sampler_prog_key_data *key_tex)
bool is_scalar)
{ {
const struct gen_device_info *devinfo = compiler->devinfo; const struct gen_device_info *devinfo = compiler->devinfo;
nir_lower_tex_options tex_options = { nir_lower_tex_options tex_options = {
@@ -966,10 +965,21 @@ brw_nir_apply_sampler_key(nir_shader *nir,
memcpy(&tex_options.scale_factors, &key_tex->scale_factors, memcpy(&tex_options.scale_factors, &key_tex->scale_factors,
sizeof(tex_options.scale_factors)); sizeof(tex_options.scale_factors));
if (nir_lower_tex(nir, &tex_options)) { return nir_lower_tex(nir, &tex_options);
nir_validate_shader(nir, "after nir_lower_tex"); }
void
brw_nir_apply_key(nir_shader *nir,
const struct brw_compiler *compiler,
const struct brw_base_prog_key *key,
bool is_scalar)
{
bool progress = false;
OPT(brw_nir_apply_sampler_key, compiler, &key->tex);
if (progress)
brw_nir_optimize(nir, compiler, is_scalar, false); brw_nir_optimize(nir, compiler, is_scalar, false);
}
} }
enum brw_reg_type enum brw_reg_type

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@@ -137,9 +137,9 @@ bool brw_nir_apply_trig_workarounds(nir_shader *nir);
void brw_nir_apply_tcs_quads_workaround(nir_shader *nir); void brw_nir_apply_tcs_quads_workaround(nir_shader *nir);
void brw_nir_apply_sampler_key(nir_shader *nir, void brw_nir_apply_key(nir_shader *nir,
const struct brw_compiler *compiler, const struct brw_compiler *compiler,
const struct brw_sampler_prog_key_data *key, const struct brw_base_prog_key *key,
bool is_scalar); bool is_scalar);
enum brw_reg_type brw_type_for_nir_type(const struct gen_device_info *devinfo, enum brw_reg_type brw_type_for_nir_type(const struct gen_device_info *devinfo,

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@@ -1244,7 +1244,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir->info.inputs_read = key->inputs_read; nir->info.inputs_read = key->inputs_read;
nir->info.patch_inputs_read = key->patch_inputs_read; nir->info.patch_inputs_read = key->patch_inputs_read;
brw_nir_apply_sampler_key(nir, compiler, &key->base.tex, is_scalar); brw_nir_apply_key(nir, compiler, &key->base, is_scalar);
brw_nir_lower_tes_inputs(nir, input_vue_map); brw_nir_lower_tes_inputs(nir, input_vue_map);
brw_nir_lower_vue_outputs(nir); brw_nir_lower_vue_outputs(nir);
brw_postprocess_nir(nir, compiler, is_scalar); brw_postprocess_nir(nir, compiler, is_scalar);

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@@ -2845,7 +2845,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
char **error_str) char **error_str)
{ {
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX]; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX];
brw_nir_apply_sampler_key(shader, compiler, &key->base.tex, is_scalar); brw_nir_apply_key(shader, compiler, &key->base, is_scalar);
const unsigned *assembly = NULL; const unsigned *assembly = NULL;

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@@ -639,7 +639,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
&c.input_vue_map, inputs_read, &c.input_vue_map, inputs_read,
shader->info.separate_shader); shader->info.separate_shader);
brw_nir_apply_sampler_key(shader, compiler, &key->base.tex, is_scalar); brw_nir_apply_key(shader, compiler, &key->base, is_scalar);
brw_nir_lower_vue_inputs(shader, &c.input_vue_map); brw_nir_lower_vue_inputs(shader, &c.input_vue_map);
brw_nir_lower_vue_outputs(shader); brw_nir_lower_vue_outputs(shader);
brw_postprocess_nir(shader, compiler, is_scalar); brw_postprocess_nir(shader, compiler, is_scalar);

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@@ -397,7 +397,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
nir->info.outputs_written, nir->info.outputs_written,
nir->info.patch_outputs_written); nir->info.patch_outputs_written);
brw_nir_apply_sampler_key(nir, compiler, &key->base.tex, is_scalar); brw_nir_apply_key(nir, compiler, &key->base, is_scalar);
brw_nir_lower_vue_inputs(nir, &input_vue_map); brw_nir_lower_vue_inputs(nir, &input_vue_map);
brw_nir_lower_tcs_outputs(nir, &vue_prog_data->vue_map, brw_nir_lower_tcs_outputs(nir, &vue_prog_data->vue_map,
key->tes_primitive_mode); key->tes_primitive_mode);