tu: enable shaderInt8 support

Enable the shaderInt8 Vulkan feature for Turnip.

As final necessary changes, an assert for nir_op_imul is tweaked to also
allow 8-bit multiplication, and nir_op_bcsel's conversion of the
conditional value from 8 to 32 bits is applied through masking, like in the
general conversion case.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10675
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29875>
This commit is contained in:
Zan Dobersek
2024-07-27 13:37:43 +02:00
committed by Marge Bot
parent e30c329026
commit f58e1ef7ec
2 changed files with 11 additions and 3 deletions

View File

@@ -758,7 +758,7 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
}
break;
case nir_op_imul:
compile_assert(ctx, alu->def.bit_size == 16);
compile_assert(ctx, alu->def.bit_size == 8 || alu->def.bit_size == 16);
dst[0] = ir3_MUL_S24(b, src[0], 0, src[1], 0);
break;
case nir_op_imul24:
@@ -841,7 +841,15 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
cond = prev_entry->data;
} else {
if (is_half(cond)) {
cond = ir3_COV(b, cond, TYPE_U16, TYPE_U32);
if (bs[0] == 8) {
/* Zero-extension of an 8-bit value has to be done through masking,
* as in create_cov.
*/
struct ir3_instruction *mask = create_immed_typed(b, 0xff, TYPE_U8);
cond = ir3_AND_B(b, cond, 0, mask, 0);
} else {
cond = ir3_COV(b, cond, TYPE_U16, TYPE_U32);
}
} else {
cond = ir3_COV(b, cond, TYPE_U32, TYPE_U16);
}

View File

@@ -390,7 +390,7 @@ tu_get_features(struct tu_physical_device *pdevice,
features->shaderBufferInt64Atomics = false;
features->shaderSharedInt64Atomics = false;
features->shaderFloat16 = true;
features->shaderInt8 = false;
features->shaderInt8 = true;
features->descriptorIndexing = true;
features->shaderInputAttachmentArrayDynamicIndexing = false;