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i965/vec4: don't modify regioning parameters to the sources of DF align1 instructions

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The regioning parameters are now properly set by convert_to_hw_regs()
and we don't need to fix them in the generator. That latter fix
previously done in the generator was strictly speaking wrong for any
non-identity regions.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
This commit is contained in:
Samuel Iglesias Gonsálvez
2017-04-25 12:28:18 +02:00
parent aaeb1c99be
commit f57e234fdd
1 changed files with 1 additions and 8 deletions
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9
src/intel/compiler/brw_vec4_generator.cpp
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@@ -1980,8 +1980,6 @@ generate_code(struct brw_codegen *p,
else
spread_dst = stride(dst, 8, 4, 2);
src[0].vstride = BRW_VERTICAL_STRIDE_4;
src[0].width = BRW_WIDTH_4;
brw_MOV(p, spread_dst, src[0]);
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -2016,9 +2014,7 @@ generate_code(struct brw_codegen *p,
src[0] = retype(src[0], BRW_REGISTER_TYPE_UD);
if (inst->opcode == VEC4_OPCODE_PICK_HIGH_32BIT)
src[0] = suboffset(src[0], 1);
src[0].vstride = BRW_VERTICAL_STRIDE_8;
src[0].width = BRW_WIDTH_4;
src[0].hstride = BRW_HORIZONTAL_STRIDE_2;
src[0] = spread(src[0], 2);
brw_MOV(p, dst, src[0]);
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -2041,9 +2037,6 @@ generate_code(struct brw_codegen *p,
dst.hstride = BRW_HORIZONTAL_STRIDE_2;
src[0] = retype(src[0], BRW_REGISTER_TYPE_UD);
src[0].vstride = BRW_VERTICAL_STRIDE_4;
src[0].width = BRW_WIDTH_4;
src[0].hstride = BRW_HORIZONTAL_STRIDE_1;
brw_MOV(p, dst, src[0]);
brw_set_default_access_mode(p, BRW_ALIGN_16);