OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/compiler: Fix disassembly of URB message descriptor on Xe2+

Browse Source 
URB messages follow the LSC message descriptor so we are already
disassembling the descriptor/extended descriptor, we don't have to
duplicate it.

Without this change:
   urb MsgDesc: ( store, a32, d32, V4, L1UC_L3WB dst_len = 0, src0_len = 2, src1_len = 8 flat )  mlen 2 ex_mlen 8 rlen 0 { align1 1H $1 };

with this change:
   urb MsgDesc: ( store, a32, d32, V4, L1UC_L3WB dst_len = 0, src0_len = 2, src1_len = 8 flat )  base_offset 0  { align1 1H $1 };

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27498>
This commit is contained in:
Sagar Ghuge
2024-02-06 11:07:27 -08:00
committed by Marge Bot
parent 7a366c0de2
commit f55f9272e4
1 changed files with 2 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/intel/compiler/brw_disasm.c
View File

@@ -2741,7 +2741,8 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa,
format(file, " ex_bso");
}
if (brw_sfid_is_lsc(sfid)) {
if (brw_sfid_is_lsc(sfid) ||
(sfid == BRW_SFID_URB && devinfo->ver >= 20)) {
lsc_disassemble_ex_desc(devinfo, imm_desc, imm_ex_desc, file);
} else {
if (has_imm_desc)