panfrost/midgard: Factorize f2f and u2u handling
Those size conversion operations work the same way apart from f2f using an fmov op code and u2u using an imov. Let's handle them in the same case block to avoid code duplication. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
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@@ -849,8 +849,13 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
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case nir_op_u2u8:
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case nir_op_u2u8:
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case nir_op_u2u16:
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case nir_op_u2u16:
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case nir_op_u2u32:
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case nir_op_u2u32:
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case nir_op_u2u64: {
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case nir_op_u2u64:
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op = midgard_alu_op_imov;
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case nir_op_f2f16:
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case nir_op_f2f32: {
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if (instr->op == nir_op_f2f16 || instr->op == nir_op_f2f32)
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op = midgard_alu_op_fmov;
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else
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op = midgard_alu_op_imov;
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if (dst_bitsize == (src_bitsize * 2)) {
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if (dst_bitsize == (src_bitsize * 2)) {
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/* Converting up */
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/* Converting up */
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@@ -866,24 +871,6 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
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break;
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break;
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}
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}
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case nir_op_f2f16: {
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assert(src_bitsize == 32);
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op = midgard_alu_op_fmov;
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dest_override = midgard_dest_override_lower;
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break;
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}
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case nir_op_f2f32: {
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assert(src_bitsize == 16);
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op = midgard_alu_op_fmov;
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half_2 = true;
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reg_mode++;
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break;
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}
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/* For greater-or-equal, we lower to less-or-equal and flip the
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/* For greater-or-equal, we lower to less-or-equal and flip the
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* arguments */
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* arguments */
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