agx: Fix atomics with no destination

We need to:

* properly null out the dest in DCE.
* not assert out when packing with null dest

Fixes potential reg pressure blow up with atomics that don't use their
destinations, though I don't see shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

src/asahi/compiler/agx_dce.c

@@ -23,9 +23,6 @@ agx_dce(agx_context *ctx, bool partial)
       }
 
       agx_foreach_instr_global_safe_rev(ctx, I) {
-         if (!agx_opcodes_info[I->op].can_eliminate)
-            continue;
-
          bool needed = false;
 
          agx_foreach_ssa_dest(I, d) {
@@ -34,13 +31,15 @@ agx_dce(agx_context *ctx, bool partial)
              * multiple destinations (splits) or that write a destination but
              * cannot be DCE'd (atomics).
              */
-            if (BITSET_TEST(seen, I->dest[d].value))
+            if (BITSET_TEST(seen, I->dest[d].value)) {
                needed = true;
-            else if (partial)
+            } else if (partial) {
                I->dest[d] = agx_null();
+               progress = true;
+            }
          }
 
-         if (!needed) {
+         if (!needed && agx_opcodes_info[I->op].can_eliminate) {
             agx_remove_instruction(I);
             progress = true;
          }

src/asahi/compiler/agx_insert_waits.c

@@ -121,6 +121,9 @@ agx_insert_waits_local(agx_context *ctx, agx_block *block)
       /* Record access */
       if (instr_is_async(I)) {
          agx_foreach_dest(I, d) {
+            if (agx_is_null(I->dest[d]))
+               continue;
+
             assert(I->dest[d].type == AGX_INDEX_REGISTER);
             BITSET_SET_RANGE(slots[I->scoreboard].writes, I->dest[d].value,
                              I->dest[d].value + agx_write_registers(I, d) - 1);

src/asahi/compiler/agx_pack.c

@@ -248,8 +248,6 @@ agx_pack_atomic_source(agx_index index)
 static unsigned
 agx_pack_atomic_dest(agx_index index, bool *flag)
 {
-   assert(index.size == AGX_SIZE_32 && "no 64-bit atomics yet");
-
    /* Atomic destinstions are optional (e.g. for update with no return) */
    if (index.type == AGX_INDEX_NULL) {
       *flag = 0;
@@ -257,6 +255,7 @@ agx_pack_atomic_dest(agx_index index, bool *flag)
    }
 
    /* But are otherwise registers */
+   assert(index.size == AGX_SIZE_32 && "no 64-bit atomics yet");
    assert_register_is_aligned(index);
    *flag = 1;
    return index.value;