radv: add initial non-conformant radv vulkan driver
This squashes all the radv development up until now into one for merging. History can be found: https://github.com/airlied/mesa/tree/semi-interesting This requires llvm 3.9 and is in no way considered a conformant vulkan implementation. It can run a number of vulkan applications, and supports all GPUs using the amdgpu kernel driver. Thanks to Intel for providing anv and spirv->nir, and Emil Velikov for reviewing build integration. Parts of this are: Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> Authors: Bas Nieuwenhuizen and Dave Airlie Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
670
src/amd/vulkan/radv_meta_resolve.c
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670
src/amd/vulkan/radv_meta_resolve.c
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@@ -0,0 +1,670 @@
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include "radv_meta.h"
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#include "radv_private.h"
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#include "nir/nir_builder.h"
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#include "sid.h"
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/**
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* Vertex attributes used by all pipelines.
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*/
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struct vertex_attrs {
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float position[2]; /**< 3DPRIM_RECTLIST */
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float tex_position[2];
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};
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/* passthrough vertex shader */
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static nir_shader *
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build_nir_vs(void)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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nir_builder b;
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nir_variable *a_position;
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nir_variable *v_position;
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nir_variable *a_tex_position;
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nir_variable *v_tex_position;
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
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b.shader->info.name = ralloc_strdup(b.shader, "meta_resolve_vs");
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a_position = nir_variable_create(b.shader, nir_var_shader_in, vec4,
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"a_position");
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a_position->data.location = VERT_ATTRIB_GENERIC0;
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v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
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"gl_Position");
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v_position->data.location = VARYING_SLOT_POS;
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a_tex_position = nir_variable_create(b.shader, nir_var_shader_in, vec4,
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"a_tex_position");
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a_tex_position->data.location = VERT_ATTRIB_GENERIC1;
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v_tex_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
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"v_tex_position");
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v_tex_position->data.location = VARYING_SLOT_VAR0;
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nir_copy_var(&b, v_position, a_position);
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nir_copy_var(&b, v_tex_position, a_tex_position);
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return b.shader;
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}
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/* simple passthrough shader */
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static nir_shader *
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build_nir_fs(void)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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nir_builder b;
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nir_variable *v_tex_position; /* vec4, varying texture coordinate */
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nir_variable *f_color; /* vec4, fragment output color */
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
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b.shader->info.name = ralloc_asprintf(b.shader,
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"meta_resolve_fs");
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v_tex_position = nir_variable_create(b.shader, nir_var_shader_in, vec4,
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"v_tex_position");
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v_tex_position->data.location = VARYING_SLOT_VAR0;
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f_color = nir_variable_create(b.shader, nir_var_shader_out, vec4,
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"f_color");
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f_color->data.location = FRAG_RESULT_DATA0;
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nir_copy_var(&b, f_color, v_tex_position);
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return b.shader;
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}
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static VkResult
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create_pass(struct radv_device *device)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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VkAttachmentDescription attachments[2];
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int i;
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for (i = 0; i < 2; i++) {
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attachments[i].format = VK_FORMAT_UNDEFINED;
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attachments[i].samples = 1;
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attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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attachments[i].storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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attachments[i].initialLayout = VK_IMAGE_LAYOUT_GENERAL;
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attachments[i].finalLayout = VK_IMAGE_LAYOUT_GENERAL;
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}
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result = radv_CreateRenderPass(device_h,
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&(VkRenderPassCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
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.attachmentCount = 2,
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.pAttachments = attachments,
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.subpassCount = 1,
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.pSubpasses = &(VkSubpassDescription) {
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.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
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.inputAttachmentCount = 0,
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.colorAttachmentCount = 2,
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.pColorAttachments = (VkAttachmentReference[]) {
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{
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.attachment = 0,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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},
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{
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.attachment = 1,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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},
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},
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.pResolveAttachments = NULL,
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.pDepthStencilAttachment = &(VkAttachmentReference) {
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.attachment = VK_ATTACHMENT_UNUSED,
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},
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.preserveAttachmentCount = 0,
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.pPreserveAttachments = NULL,
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},
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.dependencyCount = 0,
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},
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alloc,
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&device->meta_state.resolve.pass);
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return result;
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}
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static VkResult
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create_pipeline(struct radv_device *device,
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VkShaderModule vs_module_h)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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struct radv_shader_module fs_module = {
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.nir = build_nir_fs(),
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};
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if (!fs_module.nir) {
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/* XXX: Need more accurate error */
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result = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto cleanup;
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}
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&(VkGraphicsPipelineCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = (VkPipelineShaderStageCreateInfo[]) {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_VERTEX_BIT,
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.module = vs_module_h,
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.pName = "main",
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},
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
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.module = radv_shader_module_to_handle(&fs_module),
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.pName = "main",
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},
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},
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.pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 1,
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.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
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{
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.binding = 0,
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.stride = sizeof(struct vertex_attrs),
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.inputRate = VK_VERTEX_INPUT_RATE_VERTEX
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},
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},
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.vertexAttributeDescriptionCount = 2,
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.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
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{
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/* Position */
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.location = 0,
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.binding = 0,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = offsetof(struct vertex_attrs, position),
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},
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{
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/* Texture Coordinate */
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.location = 1,
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.binding = 0,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = offsetof(struct vertex_attrs, tex_position),
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},
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},
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},
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.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
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.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
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.primitiveRestartEnable = false,
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},
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 0,
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.scissorCount = 0,
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},
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.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
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.depthClampEnable = false,
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.rasterizerDiscardEnable = false,
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.polygonMode = VK_POLYGON_MODE_FILL,
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.cullMode = VK_CULL_MODE_NONE,
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.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
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},
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
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.logicOpEnable = false,
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.attachmentCount = 2,
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.pAttachments = (VkPipelineColorBlendAttachmentState []) {
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{
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.colorWriteMask = VK_COLOR_COMPONENT_R_BIT |
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VK_COLOR_COMPONENT_G_BIT |
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VK_COLOR_COMPONENT_B_BIT |
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VK_COLOR_COMPONENT_A_BIT,
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},
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{
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.colorWriteMask = 0,
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}
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},
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},
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.pDynamicState = NULL,
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.renderPass = device->meta_state.resolve.pass,
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.subpass = 0,
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},
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.custom_blend_mode = V_028808_CB_RESOLVE,
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},
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&device->meta_state.alloc,
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&device->meta_state.resolve.pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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goto cleanup;
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cleanup:
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ralloc_free(fs_module.nir);
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return result;
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}
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void
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radv_device_finish_meta_resolve_state(struct radv_device *device)
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{
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struct radv_meta_state *state = &device->meta_state;
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VkDevice device_h = radv_device_to_handle(device);
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VkRenderPass pass_h = device->meta_state.resolve.pass;
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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if (pass_h)
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RADV_CALL(DestroyRenderPass)(device_h, pass_h,
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&device->meta_state.alloc);
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VkPipeline pipeline_h = state->resolve.pipeline;
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if (pipeline_h) {
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RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc);
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}
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}
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VkResult
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radv_device_init_meta_resolve_state(struct radv_device *device)
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{
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VkResult res = VK_SUCCESS;
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zero(device->meta_state.resolve);
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struct radv_shader_module vs_module = { .nir = build_nir_vs() };
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if (!vs_module.nir) {
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/* XXX: Need more accurate error */
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res = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto fail;
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}
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res = create_pass(device);
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if (res != VK_SUCCESS)
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goto fail;
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VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
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res = create_pipeline(device, vs_module_h);
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if (res != VK_SUCCESS)
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goto fail;
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goto cleanup;
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fail:
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radv_device_finish_meta_resolve_state(device);
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cleanup:
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ralloc_free(vs_module.nir);
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return res;
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}
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static void
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emit_resolve(struct radv_cmd_buffer *cmd_buffer,
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const VkOffset2D *src_offset,
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const VkOffset2D *dest_offset,
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const VkExtent2D *resolve_extent)
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{
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struct radv_device *device = cmd_buffer->device;
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VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
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uint32_t offset;
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const struct vertex_attrs vertex_data[3] = {
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{
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.position = {
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dest_offset->x,
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dest_offset->y,
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},
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.tex_position = {
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src_offset->x,
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src_offset->y,
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},
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},
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{
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.position = {
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dest_offset->x,
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dest_offset->y + resolve_extent->height,
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},
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.tex_position = {
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src_offset->x,
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src_offset->y + resolve_extent->height,
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},
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},
|
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{
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.position = {
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dest_offset->x + resolve_extent->width,
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dest_offset->y,
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},
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.tex_position = {
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src_offset->x + resolve_extent->width,
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src_offset->y,
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},
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},
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};
|
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cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
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radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset);
|
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struct radv_buffer vertex_buffer = {
|
||||
.device = device,
|
||||
.size = sizeof(vertex_data),
|
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.bo = cmd_buffer->upload.upload_bo,
|
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.offset = offset,
|
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};
|
||||
|
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VkBuffer vertex_buffer_h = radv_buffer_to_handle(&vertex_buffer);
|
||||
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radv_CmdBindVertexBuffers(cmd_buffer_h,
|
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/*firstBinding*/ 0,
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/*bindingCount*/ 1,
|
||||
(VkBuffer[]) { vertex_buffer_h },
|
||||
(VkDeviceSize[]) { 0 });
|
||||
|
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VkPipeline pipeline_h = device->meta_state.resolve.pipeline;
|
||||
RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h);
|
||||
|
||||
if (cmd_buffer->state.pipeline != pipeline) {
|
||||
radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
|
||||
pipeline_h);
|
||||
}
|
||||
|
||||
RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
|
||||
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
|
||||
si_emit_cache_flush(cmd_buffer);
|
||||
}
|
||||
|
||||
void radv_CmdResolveImage(
|
||||
VkCommandBuffer cmd_buffer_h,
|
||||
VkImage src_image_h,
|
||||
VkImageLayout src_image_layout,
|
||||
VkImage dest_image_h,
|
||||
VkImageLayout dest_image_layout,
|
||||
uint32_t region_count,
|
||||
const VkImageResolve* regions)
|
||||
{
|
||||
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, cmd_buffer_h);
|
||||
RADV_FROM_HANDLE(radv_image, src_image, src_image_h);
|
||||
RADV_FROM_HANDLE(radv_image, dest_image, dest_image_h);
|
||||
struct radv_device *device = cmd_buffer->device;
|
||||
struct radv_meta_saved_state saved_state;
|
||||
VkDevice device_h = radv_device_to_handle(device);
|
||||
bool use_compute_resolve = false;
|
||||
|
||||
/* we can use the hw resolve only for single full resolves */
|
||||
if (region_count == 1) {
|
||||
if (regions[0].srcOffset.x ||
|
||||
regions[0].srcOffset.y ||
|
||||
regions[0].srcOffset.z)
|
||||
use_compute_resolve = true;
|
||||
if (regions[0].dstOffset.x ||
|
||||
regions[0].dstOffset.y ||
|
||||
regions[0].dstOffset.z)
|
||||
use_compute_resolve = true;
|
||||
|
||||
if (regions[0].extent.width != src_image->extent.width ||
|
||||
regions[0].extent.height != src_image->extent.height ||
|
||||
regions[0].extent.depth != src_image->extent.depth)
|
||||
use_compute_resolve = true;
|
||||
} else
|
||||
use_compute_resolve = true;
|
||||
|
||||
if (use_compute_resolve) {
|
||||
radv_meta_resolve_compute_image(cmd_buffer,
|
||||
src_image,
|
||||
src_image_layout,
|
||||
dest_image,
|
||||
dest_image_layout,
|
||||
region_count, regions);
|
||||
return;
|
||||
}
|
||||
|
||||
radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer);
|
||||
|
||||
assert(src_image->samples > 1);
|
||||
assert(dest_image->samples == 1);
|
||||
|
||||
if (src_image->samples >= 16) {
|
||||
/* See commit aa3f9aaf31e9056a255f9e0472ebdfdaa60abe54 for the
|
||||
* glBlitFramebuffer workaround for samples >= 16.
|
||||
*/
|
||||
radv_finishme("vkCmdResolveImage: need interpolation workaround when "
|
||||
"samples >= 16");
|
||||
}
|
||||
|
||||
if (src_image->array_size > 1)
|
||||
radv_finishme("vkCmdResolveImage: multisample array images");
|
||||
|
||||
for (uint32_t r = 0; r < region_count; ++r) {
|
||||
const VkImageResolve *region = ®ions[r];
|
||||
|
||||
/* From the Vulkan 1.0 spec:
|
||||
*
|
||||
* - The aspectMask member of srcSubresource and dstSubresource must
|
||||
* only contain VK_IMAGE_ASPECT_COLOR_BIT
|
||||
*
|
||||
* - The layerCount member of srcSubresource and dstSubresource must
|
||||
* match
|
||||
*/
|
||||
assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
|
||||
assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
|
||||
assert(region->srcSubresource.layerCount ==
|
||||
region->dstSubresource.layerCount);
|
||||
|
||||
const uint32_t src_base_layer =
|
||||
radv_meta_get_iview_layer(src_image, ®ion->srcSubresource,
|
||||
®ion->srcOffset);
|
||||
|
||||
const uint32_t dest_base_layer =
|
||||
radv_meta_get_iview_layer(dest_image, ®ion->dstSubresource,
|
||||
®ion->dstOffset);
|
||||
|
||||
/**
|
||||
* From Vulkan 1.0.6 spec: 18.6 Resolving Multisample Images
|
||||
*
|
||||
* extent is the size in texels of the source image to resolve in width,
|
||||
* height and depth. 1D images use only x and width. 2D images use x, y,
|
||||
* width and height. 3D images use x, y, z, width, height and depth.
|
||||
*
|
||||
* srcOffset and dstOffset select the initial x, y, and z offsets in
|
||||
* texels of the sub-regions of the source and destination image data.
|
||||
* extent is the size in texels of the source image to resolve in width,
|
||||
* height and depth. 1D images use only x and width. 2D images use x, y,
|
||||
* width and height. 3D images use x, y, z, width, height and depth.
|
||||
*/
|
||||
const struct VkExtent3D extent =
|
||||
radv_sanitize_image_extent(src_image->type, region->extent);
|
||||
const struct VkOffset3D srcOffset =
|
||||
radv_sanitize_image_offset(src_image->type, region->srcOffset);
|
||||
const struct VkOffset3D dstOffset =
|
||||
radv_sanitize_image_offset(dest_image->type, region->dstOffset);
|
||||
|
||||
|
||||
for (uint32_t layer = 0; layer < region->srcSubresource.layerCount;
|
||||
++layer) {
|
||||
|
||||
struct radv_image_view src_iview;
|
||||
radv_image_view_init(&src_iview, cmd_buffer->device,
|
||||
&(VkImageViewCreateInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
||||
.image = src_image_h,
|
||||
.viewType = radv_meta_get_view_type(src_image),
|
||||
.format = src_image->vk_format,
|
||||
.subresourceRange = {
|
||||
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
|
||||
.baseMipLevel = region->srcSubresource.mipLevel,
|
||||
.levelCount = 1,
|
||||
.baseArrayLayer = src_base_layer + layer,
|
||||
.layerCount = 1,
|
||||
},
|
||||
},
|
||||
cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT);
|
||||
|
||||
struct radv_image_view dest_iview;
|
||||
radv_image_view_init(&dest_iview, cmd_buffer->device,
|
||||
&(VkImageViewCreateInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
||||
.image = dest_image_h,
|
||||
.viewType = radv_meta_get_view_type(dest_image),
|
||||
.format = dest_image->vk_format,
|
||||
.subresourceRange = {
|
||||
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
|
||||
.baseMipLevel = region->dstSubresource.mipLevel,
|
||||
.levelCount = 1,
|
||||
.baseArrayLayer = dest_base_layer + layer,
|
||||
.layerCount = 1,
|
||||
},
|
||||
},
|
||||
cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
|
||||
|
||||
VkFramebuffer fb_h;
|
||||
radv_CreateFramebuffer(device_h,
|
||||
&(VkFramebufferCreateInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
|
||||
.attachmentCount = 2,
|
||||
.pAttachments = (VkImageView[]) {
|
||||
radv_image_view_to_handle(&src_iview),
|
||||
radv_image_view_to_handle(&dest_iview),
|
||||
},
|
||||
.width = radv_minify(dest_image->extent.width,
|
||||
region->dstSubresource.mipLevel),
|
||||
.height = radv_minify(dest_image->extent.height,
|
||||
region->dstSubresource.mipLevel),
|
||||
.layers = 1
|
||||
},
|
||||
&cmd_buffer->pool->alloc,
|
||||
&fb_h);
|
||||
|
||||
RADV_CALL(CmdBeginRenderPass)(cmd_buffer_h,
|
||||
&(VkRenderPassBeginInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
|
||||
.renderPass = device->meta_state.resolve.pass,
|
||||
.framebuffer = fb_h,
|
||||
.renderArea = {
|
||||
.offset = {
|
||||
dstOffset.x,
|
||||
dstOffset.y,
|
||||
},
|
||||
.extent = {
|
||||
extent.width,
|
||||
extent.height,
|
||||
}
|
||||
},
|
||||
.clearValueCount = 0,
|
||||
.pClearValues = NULL,
|
||||
},
|
||||
VK_SUBPASS_CONTENTS_INLINE);
|
||||
|
||||
emit_resolve(cmd_buffer,
|
||||
&(VkOffset2D) {
|
||||
.x = srcOffset.x,
|
||||
.y = srcOffset.y,
|
||||
},
|
||||
&(VkOffset2D) {
|
||||
.x = dstOffset.x,
|
||||
.y = dstOffset.y,
|
||||
},
|
||||
&(VkExtent2D) {
|
||||
.width = extent.width,
|
||||
.height = extent.height,
|
||||
});
|
||||
|
||||
RADV_CALL(CmdEndRenderPass)(cmd_buffer_h);
|
||||
|
||||
radv_DestroyFramebuffer(device_h, fb_h,
|
||||
&cmd_buffer->pool->alloc);
|
||||
}
|
||||
}
|
||||
|
||||
radv_meta_restore(&saved_state, cmd_buffer);
|
||||
}
|
||||
|
||||
/**
|
||||
* Emit any needed resolves for the current subpass.
|
||||
*/
|
||||
void
|
||||
radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
|
||||
{
|
||||
struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
|
||||
const struct radv_subpass *subpass = cmd_buffer->state.subpass;
|
||||
struct radv_meta_saved_state saved_state;
|
||||
|
||||
/* FINISHME(perf): Skip clears for resolve attachments.
|
||||
*
|
||||
* From the Vulkan 1.0 spec:
|
||||
*
|
||||
* If the first use of an attachment in a render pass is as a resolve
|
||||
* attachment, then the loadOp is effectively ignored as the resolve is
|
||||
* guaranteed to overwrite all pixels in the render area.
|
||||
*/
|
||||
|
||||
if (!subpass->has_resolve)
|
||||
return;
|
||||
|
||||
radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer);
|
||||
|
||||
for (uint32_t i = 0; i < subpass->color_count; ++i) {
|
||||
VkAttachmentReference src_att = subpass->color_attachments[i];
|
||||
VkAttachmentReference dest_att = subpass->resolve_attachments[i];
|
||||
struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image;
|
||||
if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
|
||||
continue;
|
||||
|
||||
if (dst_img->surface.dcc_size) {
|
||||
radv_initialize_dcc(cmd_buffer, dst_img, 0xffffffff);
|
||||
cmd_buffer->state.attachments[dest_att.attachment].current_layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
|
||||
}
|
||||
|
||||
struct radv_subpass resolve_subpass = {
|
||||
.color_count = 2,
|
||||
.color_attachments = (VkAttachmentReference[]) { src_att, dest_att },
|
||||
.depth_stencil_attachment = { .attachment = VK_ATTACHMENT_UNUSED },
|
||||
};
|
||||
|
||||
radv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass, false);
|
||||
|
||||
/* Subpass resolves must respect the render area. We can ignore the
|
||||
* render area here because vkCmdBeginRenderPass set the render area
|
||||
* with 3DSTATE_DRAWING_RECTANGLE.
|
||||
*
|
||||
* XXX(chadv): Does the hardware really respect
|
||||
* 3DSTATE_DRAWING_RECTANGLE when draing a 3DPRIM_RECTLIST?
|
||||
*/
|
||||
emit_resolve(cmd_buffer,
|
||||
&(VkOffset2D) { 0, 0 },
|
||||
&(VkOffset2D) { 0, 0 },
|
||||
&(VkExtent2D) { fb->width, fb->height });
|
||||
}
|
||||
|
||||
cmd_buffer->state.subpass = subpass;
|
||||
radv_meta_restore(&saved_state, cmd_buffer);
|
||||
}
|
Reference in New Issue
Block a user