radv: add initial non-conformant radv vulkan driver
This squashes all the radv development up until now into one for merging. History can be found: https://github.com/airlied/mesa/tree/semi-interesting This requires llvm 3.9 and is in no way considered a conformant vulkan implementation. It can run a number of vulkan applications, and supports all GPUs using the amdgpu kernel driver. Thanks to Intel for providing anv and spirv->nir, and Emil Velikov for reviewing build integration. Parts of this are: Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> Authors: Bas Nieuwenhuizen and Dave Airlie Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
463
src/amd/vulkan/radv_meta_decompress.c
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463
src/amd/vulkan/radv_meta_decompress.c
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@@ -0,0 +1,463 @@
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include "radv_meta.h"
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#include "radv_private.h"
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#include "nir/nir_builder.h"
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#include "sid.h"
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/**
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* Vertex attributes used by all pipelines.
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*/
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struct vertex_attrs {
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float position[2]; /**< 3DPRIM_RECTLIST */
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};
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/* passthrough vertex shader */
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static nir_shader *
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build_nir_vs(void)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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nir_builder b;
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nir_variable *a_position;
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nir_variable *v_position;
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
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b.shader->info.name = ralloc_strdup(b.shader, "meta_depth_decomp_vs");
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a_position = nir_variable_create(b.shader, nir_var_shader_in, vec4,
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"a_position");
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a_position->data.location = VERT_ATTRIB_GENERIC0;
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v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
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"gl_Position");
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v_position->data.location = VARYING_SLOT_POS;
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nir_copy_var(&b, v_position, a_position);
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return b.shader;
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}
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/* simple passthrough shader */
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static nir_shader *
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build_nir_fs(void)
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{
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nir_builder b;
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
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b.shader->info.name = ralloc_asprintf(b.shader,
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"meta_depth_decomp_noop_fs");
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return b.shader;
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}
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static VkResult
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create_pass(struct radv_device *device)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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VkAttachmentDescription attachment;
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attachment.format = VK_FORMAT_UNDEFINED;
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attachment.samples = 1;
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attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
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attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
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attachment.initialLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
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attachment.finalLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
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result = radv_CreateRenderPass(device_h,
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&(VkRenderPassCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments = &attachment,
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.subpassCount = 1,
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.pSubpasses = &(VkSubpassDescription) {
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.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
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.inputAttachmentCount = 0,
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.colorAttachmentCount = 0,
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.pColorAttachments = NULL,
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.pResolveAttachments = NULL,
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.pDepthStencilAttachment = &(VkAttachmentReference) {
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.attachment = 0,
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.layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
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},
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.preserveAttachmentCount = 0,
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.pPreserveAttachments = NULL,
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},
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.dependencyCount = 0,
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},
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alloc,
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&device->meta_state.depth_decomp.pass);
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return result;
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}
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static VkResult
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create_pipeline(struct radv_device *device,
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VkShaderModule vs_module_h)
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{
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VkResult result;
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VkDevice device_h = radv_device_to_handle(device);
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struct radv_shader_module fs_module = {
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.nir = build_nir_fs(),
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};
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if (!fs_module.nir) {
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/* XXX: Need more accurate error */
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result = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto cleanup;
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}
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const VkGraphicsPipelineCreateInfo pipeline_create_info = {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = 2,
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.pStages = (VkPipelineShaderStageCreateInfo[]) {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_VERTEX_BIT,
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.module = vs_module_h,
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.pName = "main",
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},
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
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.module = radv_shader_module_to_handle(&fs_module),
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.pName = "main",
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},
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},
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.pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 1,
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.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
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{
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.binding = 0,
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.stride = sizeof(struct vertex_attrs),
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.inputRate = VK_VERTEX_INPUT_RATE_VERTEX
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},
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},
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.vertexAttributeDescriptionCount = 1,
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.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
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{
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/* Position */
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.location = 0,
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.binding = 0,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = offsetof(struct vertex_attrs, position),
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},
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},
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},
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.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
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.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
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.primitiveRestartEnable = false,
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},
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 0,
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.scissorCount = 0,
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},
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.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
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.depthClampEnable = false,
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.rasterizerDiscardEnable = false,
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.polygonMode = VK_POLYGON_MODE_FILL,
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.cullMode = VK_CULL_MODE_NONE,
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.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
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},
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = NULL,
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.alphaToCoverageEnable = false,
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.alphaToOneEnable = false,
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},
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.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
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.logicOpEnable = false,
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.attachmentCount = 0,
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.pAttachments = NULL,
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},
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.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
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.depthTestEnable = false,
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.depthWriteEnable = false,
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.depthBoundsTestEnable = false,
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.stencilTestEnable = false,
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},
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.pDynamicState = NULL,
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.renderPass = device->meta_state.depth_decomp.pass,
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.subpass = 0,
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};
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&pipeline_create_info,
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.db_flush_depth_inplace = true,
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.db_flush_stencil_inplace = true,
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},
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&device->meta_state.alloc,
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&device->meta_state.depth_decomp.decompress_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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result = radv_graphics_pipeline_create(device_h,
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radv_pipeline_cache_to_handle(&device->meta_state.cache),
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&pipeline_create_info,
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&(struct radv_graphics_pipeline_create_info) {
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.use_rectlist = true,
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.db_flush_depth_inplace = true,
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.db_flush_stencil_inplace = true,
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.db_resummarize = true,
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},
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&device->meta_state.alloc,
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&device->meta_state.depth_decomp.resummarize_pipeline);
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if (result != VK_SUCCESS)
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goto cleanup;
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goto cleanup;
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cleanup:
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ralloc_free(fs_module.nir);
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return result;
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}
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void
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radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
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{
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struct radv_meta_state *state = &device->meta_state;
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VkDevice device_h = radv_device_to_handle(device);
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VkRenderPass pass_h = device->meta_state.depth_decomp.pass;
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const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
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if (pass_h)
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RADV_CALL(DestroyRenderPass)(device_h, pass_h,
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&device->meta_state.alloc);
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VkPipeline pipeline_h = state->depth_decomp.decompress_pipeline;
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if (pipeline_h) {
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RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc);
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}
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pipeline_h = state->depth_decomp.resummarize_pipeline;
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if (pipeline_h) {
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RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc);
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}
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}
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VkResult
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radv_device_init_meta_depth_decomp_state(struct radv_device *device)
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{
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VkResult res = VK_SUCCESS;
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zero(device->meta_state.depth_decomp);
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struct radv_shader_module vs_module = { .nir = build_nir_vs() };
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if (!vs_module.nir) {
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/* XXX: Need more accurate error */
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res = VK_ERROR_OUT_OF_HOST_MEMORY;
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goto fail;
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}
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res = create_pass(device);
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if (res != VK_SUCCESS)
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goto fail;
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VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
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res = create_pipeline(device, vs_module_h);
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if (res != VK_SUCCESS)
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goto fail;
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goto cleanup;
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fail:
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radv_device_finish_meta_depth_decomp_state(device);
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cleanup:
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ralloc_free(vs_module.nir);
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return res;
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}
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static void
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emit_depth_decomp(struct radv_cmd_buffer *cmd_buffer,
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const VkOffset2D *dest_offset,
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const VkExtent2D *depth_decomp_extent,
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VkPipeline pipeline_h)
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{
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struct radv_device *device = cmd_buffer->device;
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VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
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uint32_t offset;
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const struct vertex_attrs vertex_data[3] = {
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{
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.position = {
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dest_offset->x,
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dest_offset->y,
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},
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},
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{
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.position = {
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dest_offset->x,
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dest_offset->y + depth_decomp_extent->height,
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},
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},
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{
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.position = {
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dest_offset->x + depth_decomp_extent->width,
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dest_offset->y,
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},
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},
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};
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radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset);
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struct radv_buffer vertex_buffer = {
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.device = device,
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.size = sizeof(vertex_data),
|
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.bo = cmd_buffer->upload.upload_bo,
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.offset = offset,
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};
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VkBuffer vertex_buffer_h = radv_buffer_to_handle(&vertex_buffer);
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radv_CmdBindVertexBuffers(cmd_buffer_h,
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/*firstBinding*/ 0,
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/*bindingCount*/ 1,
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(VkBuffer[]) { vertex_buffer_h },
|
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(VkDeviceSize[]) { 0 });
|
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RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h);
|
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|
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if (cmd_buffer->state.pipeline != pipeline) {
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radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
|
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pipeline_h);
|
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}
|
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RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
|
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}
|
||||
|
||||
|
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static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
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struct radv_image *image,
|
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VkImageSubresourceRange *subresourceRange,
|
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VkPipeline pipeline_h)
|
||||
{
|
||||
struct radv_meta_saved_state saved_state;
|
||||
struct radv_meta_saved_pass_state saved_pass_state;
|
||||
VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
|
||||
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
|
||||
uint32_t width = radv_minify(image->extent.width,
|
||||
subresourceRange->baseMipLevel);
|
||||
uint32_t height = radv_minify(image->extent.height,
|
||||
subresourceRange->baseMipLevel);
|
||||
|
||||
if (!image->htile.size)
|
||||
return;
|
||||
radv_meta_save_pass(&saved_pass_state, cmd_buffer);
|
||||
|
||||
radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer);
|
||||
|
||||
for (uint32_t layer = 0; layer < subresourceRange->layerCount; layer++) {
|
||||
struct radv_image_view iview;
|
||||
|
||||
radv_image_view_init(&iview, cmd_buffer->device,
|
||||
&(VkImageViewCreateInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
||||
.image = radv_image_to_handle(image),
|
||||
.format = image->vk_format,
|
||||
.subresourceRange = {
|
||||
.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT,
|
||||
.baseMipLevel = subresourceRange->baseMipLevel,
|
||||
.levelCount = 1,
|
||||
.baseArrayLayer = subresourceRange->baseArrayLayer + layer,
|
||||
.layerCount = 1,
|
||||
},
|
||||
},
|
||||
cmd_buffer, VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT);
|
||||
|
||||
|
||||
VkFramebuffer fb_h;
|
||||
radv_CreateFramebuffer(device_h,
|
||||
&(VkFramebufferCreateInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
|
||||
.attachmentCount = 1,
|
||||
.pAttachments = (VkImageView[]) {
|
||||
radv_image_view_to_handle(&iview)
|
||||
},
|
||||
.width = width,
|
||||
.height = height,
|
||||
.layers = 1
|
||||
},
|
||||
&cmd_buffer->pool->alloc,
|
||||
&fb_h);
|
||||
|
||||
RADV_CALL(CmdBeginRenderPass)(cmd_buffer_h,
|
||||
&(VkRenderPassBeginInfo) {
|
||||
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
|
||||
.renderPass = cmd_buffer->device->meta_state.depth_decomp.pass,
|
||||
.framebuffer = fb_h,
|
||||
.renderArea = {
|
||||
.offset = {
|
||||
0,
|
||||
0,
|
||||
},
|
||||
.extent = {
|
||||
width,
|
||||
height,
|
||||
}
|
||||
},
|
||||
.clearValueCount = 0,
|
||||
.pClearValues = NULL,
|
||||
},
|
||||
VK_SUBPASS_CONTENTS_INLINE);
|
||||
|
||||
emit_depth_decomp(cmd_buffer, &(VkOffset2D){0, 0 }, &(VkExtent2D){width, height}, pipeline_h);
|
||||
RADV_CALL(CmdEndRenderPass)(cmd_buffer_h);
|
||||
|
||||
radv_DestroyFramebuffer(device_h, fb_h,
|
||||
&cmd_buffer->pool->alloc);
|
||||
}
|
||||
radv_meta_restore(&saved_state, cmd_buffer);
|
||||
radv_meta_restore_pass(&saved_pass_state, cmd_buffer);
|
||||
}
|
||||
|
||||
void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
||||
struct radv_image *image,
|
||||
VkImageSubresourceRange *subresourceRange)
|
||||
{
|
||||
radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange,
|
||||
cmd_buffer->device->meta_state.depth_decomp.decompress_pipeline);
|
||||
}
|
||||
|
||||
void radv_resummarize_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
|
||||
struct radv_image *image,
|
||||
VkImageSubresourceRange *subresourceRange)
|
||||
{
|
||||
radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange,
|
||||
cmd_buffer->device->meta_state.depth_decomp.resummarize_pipeline);
|
||||
}
|
||||
Reference in New Issue
Block a user