winsys/amdgpu-radeon: Allow specifying context priority

This is needed to implement EGL_IMG_context_priority in radeonsi.

Signed-off-by: Vlad Zahorodnii <vlad.zahorodnii@kde.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16594>

src/gallium/drivers/r300/r300_context.c

@@ -400,7 +400,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
 
     slab_create_child(&r300->pool_transfers, &r300screen->pool_transfers);
 
-    r300->ctx = rws->ctx_create(rws);
+    r300->ctx = rws->ctx_create(rws, RADEON_CTX_PRIORITY_MEDIUM);
     if (!r300->ctx)
         goto fail;
 

src/gallium/drivers/r600/r600_pipe_common.c

@@ -632,7 +632,7 @@ bool r600_common_context_init(struct r600_common_context *rctx,
 	if (!rctx->b.const_uploader)
 		return false;
 
-	rctx->ctx = rctx->ws->ctx_create(rctx->ws);
+	rctx->ctx = rctx->ws->ctx_create(rctx->ws, RADEON_CTX_PRIORITY_MEDIUM);
 	if (!rctx->ctx)
 		return false;
 

src/gallium/drivers/radeonsi/radeon_vcn_dec.c

@@ -2792,7 +2792,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
          goto err;
       for (i = 0; i < dec->njctx; i++) {
       /* Initialize the context handle and the command stream. */
-         dec->jctx[i] = dec->ws->ctx_create(dec->ws);
+         dec->jctx[i] = dec->ws->ctx_create(dec->ws, RADEON_CTX_PRIORITY_MEDIUM);
          if (!sctx->ctx)
             goto error;
          if (!dec->ws->cs_create(&dec->jcs[i], dec->jctx[i], ring, NULL, NULL, false)) {

src/gallium/drivers/radeonsi/si_pipe.c

@@ -465,6 +465,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
    struct radeon_winsys *ws = sscreen->ws;
    int shader, i;
    bool stop_exec_on_failure = (flags & PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET) != 0;
+   enum radeon_ctx_priority priority;
 
    if (!sctx) {
       fprintf(stderr, "radeonsi: can't allocate a context\n");
@@ -500,8 +501,10 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
       }
    }
 
+   priority = RADEON_CTX_PRIORITY_MEDIUM;
+
    /* Initialize the context handle and the command stream. */
-   sctx->ctx = sctx->ws->ctx_create(sctx->ws);
+   sctx->ctx = sctx->ws->ctx_create(sctx->ws, priority);
    if (!sctx->ctx) {
       fprintf(stderr, "radeonsi: can't create radeon_winsys_ctx\n");
       goto fail;

src/gallium/include/winsys/radeon_winsys.h

@@ -122,6 +122,14 @@ enum radeon_value_id
    RADEON_CS_THREAD_TIME,
 };
 
+enum radeon_ctx_priority
+{
+   RADEON_CTX_PRIORITY_LOW = 0,
+   RADEON_CTX_PRIORITY_MEDIUM,
+   RADEON_CTX_PRIORITY_HIGH,
+   RADEON_CTX_PRIORITY_REALTIME,
+};
+
 /* Each group of two has the same priority. */
 #define RADEON_PRIO_FENCE_TRACE (1 << 0)
 #define RADEON_PRIO_SO_FILLED_SIZE (1 << 1)
@@ -465,7 +473,8 @@ struct radeon_winsys {
     * Create a command submission context.
     * Various command streams can be submitted to the same context.
     */
-   struct radeon_winsys_ctx *(*ctx_create)(struct radeon_winsys *ws);
+   struct radeon_winsys_ctx *(*ctx_create)(struct radeon_winsys *ws,
+                                           enum radeon_ctx_priority priority);
 
    /**
     * Destroy a context.

src/gallium/winsys/amdgpu/drm/amdgpu_cs.c

@@ -273,11 +273,30 @@ amdgpu_cs_get_next_fence(struct radeon_cmdbuf *rcs)
 
 /* CONTEXTS */
 
-static struct radeon_winsys_ctx *amdgpu_ctx_create(struct radeon_winsys *ws)
+static uint32_t
+radeon_to_amdgpu_priority(enum radeon_ctx_priority radeon_priority)
+{
+   switch (radeon_priority) {
+   case RADEON_CTX_PRIORITY_REALTIME:
+      return AMDGPU_CTX_PRIORITY_VERY_HIGH;
+   case RADEON_CTX_PRIORITY_HIGH:
+      return AMDGPU_CTX_PRIORITY_HIGH;
+   case RADEON_CTX_PRIORITY_MEDIUM:
+      return AMDGPU_CTX_PRIORITY_NORMAL;
+   case RADEON_CTX_PRIORITY_LOW:
+      return AMDGPU_CTX_PRIORITY_LOW;
+   default:
+      unreachable("Invalid context priority");
+   }
+}
+
+static struct radeon_winsys_ctx *amdgpu_ctx_create(struct radeon_winsys *ws,
+                                                   enum radeon_ctx_priority priority)
 {
    struct amdgpu_ctx *ctx = CALLOC_STRUCT(amdgpu_ctx);
    int r;
    struct amdgpu_bo_alloc_request alloc_buffer = {};
+   uint32_t amdgpu_priority = radeon_to_amdgpu_priority(priority);
    amdgpu_bo_handle buf_handle;
 
    if (!ctx)
@@ -287,9 +306,9 @@ static struct radeon_winsys_ctx *amdgpu_ctx_create(struct radeon_winsys *ws)
    ctx->refcount = 1;
    ctx->initial_num_total_rejected_cs = ctx->ws->num_total_rejected_cs;
 
-   r = amdgpu_cs_ctx_create(ctx->ws->dev, &ctx->ctx);
+   r = amdgpu_cs_ctx_create2(ctx->ws->dev, amdgpu_priority, &ctx->ctx);
    if (r) {
-      fprintf(stderr, "amdgpu: amdgpu_cs_ctx_create failed. (%i)\n", r);
+      fprintf(stderr, "amdgpu: amdgpu_cs_ctx_create2 failed. (%i)\n", r);
       goto error_create;
    }
 

src/gallium/winsys/radeon/drm/radeon_drm_cs.c

@@ -70,7 +70,8 @@ static struct pipe_fence_handle *radeon_cs_create_fence(struct radeon_cmdbuf *rc
 static void radeon_fence_reference(struct pipe_fence_handle **dst,
                                    struct pipe_fence_handle *src);
 
-static struct radeon_winsys_ctx *radeon_drm_ctx_create(struct radeon_winsys *ws)
+static struct radeon_winsys_ctx *radeon_drm_ctx_create(struct radeon_winsys *ws,
+                                                       enum radeon_ctx_priority priority)
 {
    struct radeon_ctx *ctx = CALLOC_STRUCT(radeon_ctx);
    if (!ctx)