agx: Model texture bindless base

Extra source we need to implement bindless.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
This commit is contained in:
Alyssa Rosenzweig
2023-05-20 13:36:10 -04:00
committed by Marge Bot
parent 4505cb962c
commit f4aa6fd22e
5 changed files with 12 additions and 10 deletions

View File

@@ -1335,7 +1335,8 @@ agx_gather_for_nir(nir_tex_instr *tex)
static void
agx_emit_tex(agx_builder *b, nir_tex_instr *instr)
{
agx_index coords = agx_null(), texture = agx_immediate(instr->texture_index),
agx_index coords = agx_null(), bindless = agx_immediate(0),
texture = agx_immediate(instr->texture_index),
sampler = agx_immediate(instr->sampler_index),
lod = agx_immediate(0), compare = agx_null(),
packed_offset = agx_null();
@@ -1432,7 +1433,7 @@ agx_emit_tex(agx_builder *b, nir_tex_instr *instr)
agx_index tmp = agx_temp(b->shader, dst.size);
agx_instr *I = agx_texture_sample_to(
b, tmp, coords, lod, texture, sampler, compare_offset,
b, tmp, coords, lod, bindless, texture, sampler, compare_offset,
agx_tex_dim(instr->sampler_dim, instr->is_array),
agx_lod_mode_for_nir(instr->op), mask, 0, !agx_is_null(packed_offset),
!agx_is_null(compare), agx_gather_for_nir(instr));

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@@ -24,7 +24,7 @@ should_lower(enum agx_opcode op, agx_index uniform, unsigned src_index)
switch (op) {
case AGX_OPCODE_TEXTURE_LOAD:
case AGX_OPCODE_TEXTURE_SAMPLE:
return src_index != 1;
return src_index != 1 && src_index != 2;
case AGX_OPCODE_DEVICE_LOAD:
return src_index != 0 || high;
case AGX_OPCODE_DEVICE_STORE:

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@@ -247,15 +247,16 @@ op("fcmpsel",
encoding_32 = (0x02, 0x7F, 8, 10),
srcs = 4, imms = [FCOND])
# sources are coordinates, LOD, texture, sampler, shadow/offset
# sources are coordinates, LOD, texture bindless base (zero for texture state
# registers), texture, sampler, shadow/offset
# TODO: anything else?
op("texture_sample",
encoding_32 = (0x31, 0x7F, 8, 10), # XXX WRONG SIZE
srcs = 5, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET, SHADOW,
srcs = 6, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET, SHADOW,
GATHER])
op("texture_load",
encoding_32 = (0x71, 0x7F, 8, 10), # XXX WRONG SIZE
srcs = 5, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET])
srcs = 6, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET])
# sources are base, index
op("device_load",

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@@ -773,9 +773,9 @@ agx_pack_instr(struct util_dynarray *emission, struct util_dynarray *fixups,
unsigned R = agx_pack_memory_reg(I->dest[0], &Rt);
unsigned C = agx_pack_sample_coords(I->src[0], &Ct, &Cs);
unsigned T = agx_pack_texture(agx_zero(), I->src[2], &U, &Tt);
unsigned S = agx_pack_sampler(I->src[3], &St);
unsigned O = agx_pack_sample_compare_offset(I->src[4]);
unsigned T = agx_pack_texture(I->src[2], I->src[3], &U, &Tt);
unsigned S = agx_pack_sampler(I->src[4], &St);
unsigned O = agx_pack_sample_compare_offset(I->src[5]);
unsigned D = agx_pack_lod(I->src[1], &lod_mode);
unsigned q1 = I->shadow;

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@@ -264,7 +264,7 @@ agx_read_registers(const agx_instr *I, unsigned s)
} else {
return 1;
}
} else if (s == 4) {
} else if (s == 5) {
/* Compare/offset */
return 2 * ((!!I->shadow) + (!!I->offset));
} else {