OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/fs: Define is_payload() method of the IR instruction class.

Browse Source 
This is required because SEND message payload sources are fetched
asynchronously by the hardware, which can lead to WaR data corruption
on Gen12+ platforms if not handled specially by the compiler to
guarantee proper synchronization.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Francisco Jerez
2018-11-09 14:13:37 -08:00
parent a42581fa8f
commit f326d9d218
2 changed files with 39 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
src/intel/compiler/brw_fs.cpp
View File

@@ -290,6 +290,44 @@ fs_inst::is_control_source(unsigned arg) const
} }
} }
bool
fs_inst::is_payload(unsigned arg) const
{
switch (opcode) {
case FS_OPCODE_FB_WRITE:
case FS_OPCODE_FB_READ:
case SHADER_OPCODE_URB_WRITE_SIMD8:
case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT:
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED:
case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT:
case SHADER_OPCODE_URB_READ_SIMD8:
case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
case VEC4_OPCODE_UNTYPED_ATOMIC:
case VEC4_OPCODE_UNTYPED_SURFACE_READ:
case VEC4_OPCODE_UNTYPED_SURFACE_WRITE:
case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
case SHADER_OPCODE_SHADER_TIME_ADD:
case FS_OPCODE_INTERPOLATE_AT_SAMPLE:
case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET:
case SHADER_OPCODE_INTERLOCK:
case SHADER_OPCODE_MEMORY_FENCE:
case SHADER_OPCODE_BARRIER:
return arg == 0;
case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
return arg == 1;
case SHADER_OPCODE_SEND:
return arg == 2 || arg == 3;
default:
if (is_tex())
return arg == 0;
else
return false;
}
}
/** /**
* Returns true if this instruction's sources and destinations cannot * Returns true if this instruction's sources and destinations cannot
* safely be the same register. * safely be the same register.

1
src/intel/compiler/brw_ir_fs.h
View File

@@ -348,6 +348,7 @@ public:
void resize_sources(uint8_t num_sources); void resize_sources(uint8_t num_sources);
bool is_send_from_grf() const; bool is_send_from_grf() const;
bool is_payload(unsigned arg) const;
bool is_partial_write() const; bool is_partial_write() const;
bool is_copy_payload(const brw::simple_allocator &grf_alloc) const; bool is_copy_payload(const brw::simple_allocator &grf_alloc) const;
unsigned components_read(unsigned i) const; unsigned components_read(unsigned i) const;