vc4: Don't consider nr_samples==1 surfaces to be MSAA.

This is apparently a weirdness of gallium -- nr_samples==1 is occasionally
used and means the same thing as nr_samples==0.  Fixes a bunch of
ARB_framebuffer_srgb blit cases in piglit.

src/gallium/drivers/vc4/vc4_blit.c

@@ -54,8 +54,8 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
         bool old_msaa = vc4->msaa;
         int old_tile_width = vc4->tile_width;
         int old_tile_height = vc4->tile_height;
-        bool msaa = (info->src.resource->nr_samples ||
+        bool msaa = (info->src.resource->nr_samples > 1 ||
-                     info->dst.resource->nr_samples);
+                     info->dst.resource->nr_samples > 1);
         int tile_width = msaa ? 32 : 64;
         int tile_height = msaa ? 32 : 64;
 
@@ -110,9 +110,11 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
 
         pipe_surface_reference(&vc4->color_read, src_surf);
         pipe_surface_reference(&vc4->color_write,
-                               dst_surf->texture->nr_samples ? NULL : dst_surf);
+                               dst_surf->texture->nr_samples > 1 ?
+                               NULL : dst_surf);
         pipe_surface_reference(&vc4->msaa_color_write,
-                               dst_surf->texture->nr_samples ? dst_surf : NULL);
+                               dst_surf->texture->nr_samples > 1 ?
+                               dst_surf : NULL);
         pipe_surface_reference(&vc4->zs_read, NULL);
         pipe_surface_reference(&vc4->zs_write, NULL);
         pipe_surface_reference(&vc4->msaa_zs_write, NULL);

src/gallium/drivers/vc4/vc4_context.c

@@ -70,11 +70,13 @@ vc4_flush(struct pipe_context *pctx)
         vc4->msaa = false;
         if (cbuf && (vc4->resolve & PIPE_CLEAR_COLOR0)) {
                 pipe_surface_reference(&vc4->color_write,
-                                       cbuf->texture->nr_samples ? NULL : cbuf);
+                                       cbuf->texture->nr_samples > 1 ?
+                                       NULL : cbuf);
                 pipe_surface_reference(&vc4->msaa_color_write,
-                                       cbuf->texture->nr_samples ? cbuf : NULL);
+                                       cbuf->texture->nr_samples > 1 ?
+                                       cbuf : NULL);
 
-                if (cbuf->texture->nr_samples)
+                if (cbuf->texture->nr_samples > 1)
                         vc4->msaa = true;
 
                 if (!(vc4->cleared & PIPE_CLEAR_COLOR0)) {
@@ -92,13 +94,13 @@ vc4_flush(struct pipe_context *pctx)
         if (vc4->framebuffer.zsbuf &&
             (vc4->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
                 pipe_surface_reference(&vc4->zs_write,
-                                       zsbuf->texture->nr_samples ?
+                                       zsbuf->texture->nr_samples > 1 ?
                                        NULL : zsbuf);
                 pipe_surface_reference(&vc4->msaa_zs_write,
-                                       zsbuf->texture->nr_samples ?
+                                       zsbuf->texture->nr_samples > 1 ?
                                        zsbuf : NULL);
 
-                if (zsbuf->texture->nr_samples)
+                if (zsbuf->texture->nr_samples > 1)
                         vc4->msaa = true;
 
                 if (!(vc4->cleared & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {

src/gallium/drivers/vc4/vc4_job.c

@@ -89,7 +89,7 @@ vc4_submit_setup_rcl_surface(struct vc4_context *vc4,
         submit_surf->hindex = vc4_gem_hindex(vc4, rsc->bo);
         submit_surf->offset = surf->offset;
 
-        if (psurf->texture->nr_samples == 0) {
+        if (psurf->texture->nr_samples <= 1) {
                 if (is_depth) {
                         submit_surf->bits =
                                 VC4_SET_FIELD(VC4_LOADSTORE_TILE_BUFFER_ZS,
@@ -132,7 +132,7 @@ vc4_submit_setup_rcl_render_config_surface(struct vc4_context *vc4,
         submit_surf->hindex = vc4_gem_hindex(vc4, rsc->bo);
         submit_surf->offset = surf->offset;
 
-        if (psurf->texture->nr_samples == 0) {
+        if (psurf->texture->nr_samples <= 1) {
                 submit_surf->bits =
                         VC4_SET_FIELD(vc4_rt_format_is_565(surf->base.format) ?
                                       VC4_RENDER_CONFIG_FORMAT_BGR565 :

src/gallium/drivers/vc4/vc4_program.c

@@ -2043,7 +2043,7 @@ vc4_setup_shared_key(struct vc4_context *vc4, struct vc4_key *key,
                 key->tex[i].swizzle[2] = sampler->swizzle_b;
                 key->tex[i].swizzle[3] = sampler->swizzle_a;
 
-                if (sampler->texture->nr_samples) {
+                if (sampler->texture->nr_samples > 1) {
                         key->tex[i].msaa_width = sampler->texture->width0;
                         key->tex[i].msaa_height = sampler->texture->height0;
                 } else if (sampler){

src/gallium/drivers/vc4/vc4_resource.c

@@ -207,7 +207,7 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
         /* If the resource is multisampled, we need to resolve to single
          * sample.  This seems like it should be handled at a higher layer.
          */
-        if (prsc->nr_samples) {
+        if (prsc->nr_samples > 1) {
                 trans->ss_resource = vc4_get_temp_resource(pctx, prsc, box);
                 if (!trans->ss_resource)
                         goto fail;
@@ -377,7 +377,7 @@ vc4_setup_slices(struct vc4_resource *rsc)
 
                 if (!rsc->tiled) {
                         slice->tiling = VC4_TILING_FORMAT_LINEAR;
-                        if (prsc->nr_samples) {
+                        if (prsc->nr_samples > 1) {
                                 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
                                 level_width = align(level_width, 32);
                                 level_height = align(level_height, 32);
@@ -458,7 +458,7 @@ vc4_resource_setup(struct pipe_screen *pscreen,
         prsc->screen = pscreen;
 
         rsc->base.vtbl = &vc4_resource_vtbl;
-        if (prsc->nr_samples == 0)
+        if (prsc->nr_samples <= 1)
                 rsc->cpp = util_format_get_blocksize(tmpl->format);
         else
                 rsc->cpp = sizeof(uint32_t);
@@ -475,7 +475,7 @@ get_resource_texture_format(struct pipe_resource *prsc)
         uint8_t format = vc4_get_tex_format(prsc->format);
 
         if (!rsc->tiled) {
-                if (prsc->nr_samples) {
+                if (prsc->nr_samples > 1) {
                         return ~0;
                 } else {
                         assert(format == VC4_TEXTURE_TYPE_RGBA8888);
@@ -497,7 +497,7 @@ vc4_resource_create(struct pipe_screen *pscreen,
          * communicate metadata about tiling currently.
          */
         if (tmpl->target == PIPE_BUFFER ||
-            tmpl->nr_samples ||
+            tmpl->nr_samples > 1 ||
             (tmpl->bind & (PIPE_BIND_SCANOUT |
                            PIPE_BIND_LINEAR |
                            PIPE_BIND_SHARED |
@@ -832,7 +832,7 @@ vc4_dump_surface(struct pipe_surface *psurf)
         if (!psurf)
                 return;
 
-        if (psurf->texture->nr_samples)
+        if (psurf->texture->nr_samples > 1)
                 vc4_dump_surface_msaa(psurf);
         else
                 vc4_dump_surface_non_msaa(psurf);

src/gallium/drivers/vc4/vc4_state.c

@@ -462,9 +462,9 @@ vc4_set_framebuffer_state(struct pipe_context *pctx,
 
         vc4->msaa = false;
         if (cso->cbufs[0])
-                vc4->msaa = cso->cbufs[0]->texture->nr_samples != 0;
+                vc4->msaa = cso->cbufs[0]->texture->nr_samples > 1;
         else if (cso->zsbuf)
-                vc4->msaa = cso->zsbuf->texture->nr_samples != 0;
+                vc4->msaa = cso->zsbuf->texture->nr_samples > 1;
 
         if (vc4->msaa) {
                 vc4->tile_width = 32;