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radv: implement dynamic depth bias enable

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10340>
This commit is contained in:
Samuel Pitoiset
2021-03-15 18:29:44 +01:00
committed by Marge Bot
parent 44e7bcf942
commit f2933e9872
5 changed files with 50 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
src/amd/vulkan/radv_cmd_buffer.c
View File

@@ -106,6 +106,7 @@ const struct radv_dynamic_state default_dynamic_state = {
.combiner_ops = {VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR,
VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR},
},
.depth_bias_enable = 0u,
};
static void
@@ -297,6 +298,13 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const struct radv_dy
}
}
if (copy_mask & RADV_DYNAMIC_DEPTH_BIAS_ENABLE) {
if (dest->depth_bias_enable != src->depth_bias_enable) {
dest->depth_bias_enable = src->depth_bias_enable;
dest_mask |= RADV_DYNAMIC_DEPTH_BIAS_ENABLE;
}
}
cmd_buffer->state.dirty |= dest_mask;
}
@@ -1258,8 +1266,9 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer)
if (!cmd_buffer->state.emitted_pipeline ||
cmd_buffer->state.emitted_pipeline->graphics.pa_su_sc_mode_cntl !=
pipeline->graphics.pa_su_sc_mode_cntl)
cmd_buffer->state.dirty |=
RADV_CMD_DIRTY_DYNAMIC_CULL_MODE | RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_CULL_MODE |
RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE |
RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
if (!cmd_buffer->state.emitted_pipeline)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY |
@@ -1434,6 +1443,14 @@ radv_emit_culling(struct radv_cmd_buffer *cmd_buffer, uint32_t states)
pa_su_sc_mode_cntl |= S_028814_FACE(d->front_face);
}
if (states & RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE) {
pa_su_sc_mode_cntl &= C_028814_POLY_OFFSET_FRONT_ENABLE & C_028814_POLY_OFFSET_BACK_ENABLE &
C_028814_POLY_OFFSET_PARA_ENABLE;
pa_su_sc_mode_cntl |= S_028814_POLY_OFFSET_FRONT_ENABLE(d->depth_bias_enable) |
S_028814_POLY_OFFSET_BACK_ENABLE(d->depth_bias_enable) |
S_028814_POLY_OFFSET_PARA_ENABLE(d->depth_bias_enable);
}
radeon_set_context_reg(cmd_buffer->cs, R_028814_PA_SU_SC_MODE_CNTL, pa_su_sc_mode_cntl);
}
@@ -2545,7 +2562,8 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer)
if (states & RADV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE)
radv_emit_line_stipple(cmd_buffer);
if (states & (RADV_CMD_DIRTY_DYNAMIC_CULL_MODE | RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE))
if (states & (RADV_CMD_DIRTY_DYNAMIC_CULL_MODE | RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE |
RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE))
radv_emit_culling(cmd_buffer, states);
if (states & RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY)
@@ -4730,6 +4748,20 @@ radv_CmdSetFragmentShadingRateKHR(VkCommandBuffer commandBuffer, const VkExtent2
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
}
void
radv_CmdSetDepthBiasEnableEXT(VkCommandBuffer commandBuffer, VkBool32 depthBiasEnable)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
struct radv_cmd_state *state = &cmd_buffer->state;
if (state->dynamic.depth_bias_enable == depthBiasEnable)
return;
state->dynamic.depth_bias_enable = depthBiasEnable;
state->dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE;
}
void
radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount,
const VkCommandBuffer *pCmdBuffers)

6
src/amd/vulkan/radv_meta.c
View File

@@ -91,6 +91,8 @@ radv_meta_save(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_
cmd_buffer->state.dynamic.fragment_shading_rate.combiner_ops[0];
state->fragment_shading_rate.combiner_ops[1] =
cmd_buffer->state.dynamic.fragment_shading_rate.combiner_ops[1];
state->depth_bias_enable = cmd_buffer->state.dynamic.depth_bias_enable;
}
if (state->flags & RADV_META_SAVE_SAMPLE_LOCATIONS) {
@@ -174,6 +176,8 @@ radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buf
cmd_buffer->state.dynamic.fragment_shading_rate.combiner_ops[1] =
state->fragment_shading_rate.combiner_ops[1];
cmd_buffer->state.dynamic.depth_bias_enable = state->depth_bias_enable;
cmd_buffer->state.dirty |=
RADV_CMD_DIRTY_DYNAMIC_VIEWPORT | RADV_CMD_DIRTY_DYNAMIC_SCISSOR |
RADV_CMD_DIRTY_DYNAMIC_CULL_MODE | RADV_CMD_DIRTY_DYNAMIC_FRONT_FACE |
@@ -181,7 +185,7 @@ radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buf
RADV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE | RADV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE |
RADV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE | RADV_CMD_DIRTY_DYNAMIC_STENCIL_OP |
RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE;
RADV_CMD_DIRTY_DYNAMIC_FRAGMENT_SHADING_RATE | RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE;
}
if (state->flags & RADV_META_SAVE_SAMPLE_LOCATIONS) {

2
src/amd/vulkan/radv_meta.h
View File

@@ -90,6 +90,8 @@ struct radv_meta_saved_state {
VkExtent2D size;
VkFragmentShadingRateCombinerOpKHR combiner_ops[2];
} fragment_shading_rate;
bool depth_bias_enable;
};
VkResult radv_device_init_meta_clear_state(struct radv_device *device, bool on_demand);

7
src/amd/vulkan/radv_pipeline.c
View File

@@ -1387,7 +1387,8 @@ radv_pipeline_needed_dynamic_state(const VkGraphicsPipelineCreateInfo *pCreateIn
if (pCreateInfo->pRasterizationState->rasterizerDiscardEnable)
return RADV_DYNAMIC_PRIMITIVE_TOPOLOGY | RADV_DYNAMIC_VERTEX_INPUT_BINDING_STRIDE;
if (!pCreateInfo->pRasterizationState->depthBiasEnable)
if (!pCreateInfo->pRasterizationState->depthBiasEnable &&
!radv_is_state_dynamic(pCreateInfo, VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE_EXT))
states &= ~RADV_DYNAMIC_DEPTH_BIAS;
if (!pCreateInfo->pDepthStencilState ||
@@ -1730,6 +1731,10 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline,
dynamic->fragment_shading_rate.combiner_ops[i] = shading_rate->combinerOps[i];
}
if (states & RADV_DYNAMIC_DEPTH_BIAS_ENABLE) {
dynamic->depth_bias_enable = pCreateInfo->pRasterizationState->depthBiasEnable;
}
pipeline->dynamic_state.mask = states;
}

2
src/amd/vulkan/radv_private.h
View File

@@ -1212,6 +1212,8 @@ struct radv_dynamic_state {
VkExtent2D size;
VkFragmentShadingRateCombinerOpKHR combiner_ops[2];
} fragment_shading_rate;
bool depth_bias_enable;
};
extern const struct radv_dynamic_state default_dynamic_state;