nak: Make SSARef::file() return Option<RegFile>

Once we start using UGPRs, it's possible to have a vector with a mix of
GPRs and UGPRs.  This isn't actually allowed by the hardware but it's
possible as an intermediate state thanks to copy-propagation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591>

src/nouveau/compiler/nak/assign_regs.rs

@@ -600,7 +600,7 @@ fn instr_remap_srcs_file(instr: &mut Instr, ra: &mut PinnedRegAllocator) {
     // scalar sources.
     for src in instr.srcs_mut() {
         if let SrcRef::SSA(ssa) = &src.src_ref {
-            if ssa.file() == ra.file() && ssa.comps() > 1 {
+            if ssa.file().unwrap() == ra.file() && ssa.comps() > 1 {
                 src.src_ref = ra.collect_vector(ssa).into();
             }
         }
@@ -614,7 +614,7 @@ fn instr_remap_srcs_file(instr: &mut Instr, ra: &mut PinnedRegAllocator) {
 
     for src in instr.srcs_mut() {
         if let SrcRef::SSA(ssa) = &src.src_ref {
-            if ssa.file() == ra.file() && ssa.comps() == 1 {
+            if ssa.file().unwrap() == ra.file() && ssa.comps() == 1 {
                 src.src_ref = ra.collect_vector(ssa).into();
             }
         }
@@ -629,7 +629,7 @@ fn instr_alloc_scalar_dsts_file(
 ) {
     for dst in instr.dsts_mut() {
         if let Dst::SSA(ssa) = dst {
-            if ssa.file() == ra.file() {
+            if ssa.file().unwrap() == ra.file() {
                 assert!(ssa.comps() == 1);
                 let reg = ra.alloc_scalar(ip, sum, ssa[0]);
                 *dst = RegRef::new(ra.file(), reg, 1).into();
@@ -657,7 +657,7 @@ fn instr_assign_regs_file(
     let mut vec_dst_comps = 0;
     for (i, dst) in instr.dsts().iter().enumerate() {
         if let Dst::SSA(ssa) = dst {
-            if ssa.file() == ra.file() && ssa.comps() > 1 {
+            if ssa.file().unwrap() == ra.file() && ssa.comps() > 1 {
                 vec_dsts.push(VecDst {
                     dst_idx: i,
                     comps: ssa.comps(),
@@ -776,7 +776,7 @@ fn instr_assign_regs_file(
         // Scalar destinations can fill in holes.
         for dst in instr.dsts_mut() {
             if let Dst::SSA(ssa) = dst {
-                if ssa.file() == pra.file() && ssa.comps() > 1 {
+                if ssa.file().unwrap() == pra.file() && ssa.comps() > 1 {
                     *dst = pra.alloc_vector(*ssa).into();
                 }
             }

src/nouveau/compiler/nak/builder.rs

@@ -679,7 +679,7 @@ pub trait SSABuilder: Builder {
     }
 
     fn bmov_to_bar(&mut self, src: Src) -> SSARef {
-        assert!(src.src_ref.as_ssa().unwrap().file() == RegFile::GPR);
+        assert!(src.src_ref.as_ssa().unwrap().file() == Some(RegFile::GPR));
         let dst = self.alloc_ssa(RegFile::Bar, 1);
         self.push_op(OpBMov {
             dst: dst.into(),
@@ -690,7 +690,7 @@ pub trait SSABuilder: Builder {
     }
 
     fn bmov_to_gpr(&mut self, src: Src) -> SSARef {
-        assert!(src.src_ref.as_ssa().unwrap().file() == RegFile::Bar);
+        assert!(src.src_ref.as_ssa().unwrap().file() == Some(RegFile::Bar));
         let dst = self.alloc_ssa(RegFile::GPR, 1);
         self.push_op(OpBMov {
             dst: dst.into(),

src/nouveau/compiler/nak/encode_sm70.rs

@@ -54,7 +54,7 @@ fn src_mod_is_bnot(src_mod: SrcMod) -> bool {
 fn dst_is_bar(dst: Dst) -> bool {
     match dst {
         Dst::None => false,
-        Dst::SSA(ssa) => ssa.file() == RegFile::Bar,
+        Dst::SSA(ssa) => ssa.file().unwrap() == RegFile::Bar,
         Dst::Reg(reg) => reg.file() == RegFile::Bar,
     }
 }

src/nouveau/compiler/nak/ir.rs

@@ -501,15 +501,45 @@ impl SSARef {
             4
         }
     }
-}
 
-impl HasRegFile for SSARef {
-    fn file(&self) -> RegFile {
+    pub fn file(&self) -> Option<RegFile> {
         let comps = usize::from(self.comps());
+        let file = self.v[0].file();
         for i in 1..comps {
-            assert!(self.v[i].file() == self.v[0].file());
+            if self.v[i].file() != file {
+                return None;
+            }
+        }
+        Some(file)
+    }
+
+    pub fn is_uniform(&self) -> bool {
+        for ssa in &self[..] {
+            if !ssa.is_uniform() {
+                return false;
+            }
+        }
+        true
+    }
+
+    pub fn is_gpr(&self) -> bool {
+        for ssa in &self[..] {
+            if !ssa.is_gpr() {
+                return false;
+            }
+        }
+        true
+    }
+
+    pub fn is_predicate(&self) -> bool {
+        if self.v[0].is_predicate() {
+            true
+        } else {
+            for ssa in &self[..] {
+                debug_assert!(!ssa.is_predicate());
+            }
+            false
         }
-        self.v[0].file()
     }
 }
 
@@ -826,7 +856,7 @@ impl SrcRef {
     #[allow(dead_code)]
     pub fn is_barrier(&self) -> bool {
         match self {
-            SrcRef::SSA(ssa) => ssa.file() == RegFile::Bar,
+            SrcRef::SSA(ssa) => ssa.file() == Some(RegFile::Bar),
             SrcRef::Reg(reg) => reg.file() == RegFile::Bar,
             _ => false,
         }
@@ -1433,7 +1463,7 @@ fn all_dsts_uniform(dsts: &[Dst]) -> bool {
         let dst_uniform = match dst {
             Dst::None => continue,
             Dst::Reg(r) => r.is_uniform(),
-            Dst::SSA(r) => r.is_uniform(),
+            Dst::SSA(r) => r.file().unwrap().is_uniform(),
         };
         assert!(uniform == None || uniform == Some(dst_uniform));
         uniform = Some(dst_uniform);
@@ -5800,7 +5830,7 @@ impl Instr {
         debug_assert!(self.has_fixed_latency(sm));
         let file = match self.dsts()[dst_idx] {
             Dst::None => return 0,
-            Dst::SSA(vec) => vec.file(),
+            Dst::SSA(vec) => vec.file().unwrap(),
             Dst::Reg(reg) => reg.file(),
         };
         if file.is_predicate() {