ac: rework emit_barrier() to not segfault on radeonsi
nir_to_llvm_context will always be NULL for radeonsi so we need work around this. Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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@@ -3831,19 +3831,18 @@ static void emit_membar(struct nir_to_llvm_context *ctx,
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ac_build_waitcnt(&ctx->ac, waitcnt);
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ac_build_waitcnt(&ctx->ac, waitcnt);
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}
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}
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static void emit_barrier(struct nir_to_llvm_context *ctx)
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static void emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
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{
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{
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/* SI only (thanks to a hw bug workaround):
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/* SI only (thanks to a hw bug workaround):
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* The real barrier instruction isn’t needed, because an entire patch
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* The real barrier instruction isn’t needed, because an entire patch
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* always fits into a single wave.
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* always fits into a single wave.
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*/
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*/
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if (ctx->options->chip_class == SI &&
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if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
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ctx->stage == MESA_SHADER_TESS_CTRL) {
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ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
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ac_build_waitcnt(&ctx->ac, LGKM_CNT & VM_CNT);
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return;
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return;
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}
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}
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ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
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ac_build_intrinsic(ac, "llvm.amdgcn.s.barrier",
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ctx->ac.voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
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ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
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}
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}
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static void emit_discard_if(struct ac_nir_context *ctx,
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static void emit_discard_if(struct ac_nir_context *ctx,
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@@ -4336,7 +4335,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
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emit_membar(ctx->nctx, instr);
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emit_membar(ctx->nctx, instr);
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break;
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break;
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case nir_intrinsic_barrier:
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case nir_intrinsic_barrier:
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emit_barrier(ctx->nctx);
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emit_barrier(&ctx->ac, ctx->stage);
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break;
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break;
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case nir_intrinsic_var_atomic_add:
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case nir_intrinsic_var_atomic_add:
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case nir_intrinsic_var_atomic_imin:
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case nir_intrinsic_var_atomic_imin:
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@@ -6179,7 +6178,7 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
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LLVMValueRef lds_base, lds_inner, lds_outer, byteoffset, buffer;
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LLVMValueRef lds_base, lds_inner, lds_outer, byteoffset, buffer;
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LLVMValueRef out[6], vec0, vec1, tf_base, inner[4], outer[4];
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LLVMValueRef out[6], vec0, vec1, tf_base, inner[4], outer[4];
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int i;
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int i;
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emit_barrier(ctx);
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emit_barrier(&ctx->ac, ctx->stage);
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switch (ctx->options->key.tcs.primitive_mode) {
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switch (ctx->options->key.tcs.primitive_mode) {
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case GL_ISOLINES:
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case GL_ISOLINES:
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@@ -6728,7 +6727,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
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}
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}
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if (i)
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if (i)
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emit_barrier(&ctx);
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emit_barrier(&ctx.ac, ctx.stage);
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ac_setup_rings(&ctx);
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ac_setup_rings(&ctx);
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