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intel/brw: Delete SAD2 and SADA2 opcodes

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These were removed with Icelake.  While they technically still exist on
Skylake, which this compiler supports, we have never used these opcodes
in the 14 years we could have done so.  So just scrap them.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29665>
This commit is contained in:
Kenneth Graunke
2024-06-10 14:31:26 -07:00
parent 15f2c9c553
commit f04bb49465
10 changed files with 1 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/intel/compiler/brw_eu.c
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@@ -641,8 +641,6 @@ static const struct opcode_desc opcode_descs[] = {
{ BRW_OPCODE_CBIT, 77, "cbit", 1, 1, GFX_ALL },
{ BRW_OPCODE_ADDC, 78, "addc", 2, 1, GFX_ALL },
{ BRW_OPCODE_SUBB, 79, "subb", 2, 1, GFX_ALL },
{ BRW_OPCODE_SAD2, 80, "sad2", 2, 1, GFX_ALL },
{ BRW_OPCODE_SADA2, 81, "sada2", 2, 1, GFX_ALL },
{ BRW_OPCODE_ADD3, 82, "add3", 3, 1, GFX_GE(GFX125) },
{ BRW_OPCODE_DP4, 84, "dp4", 2, 1, GFX_LT(GFX11) },
{ BRW_OPCODE_DPH, 85, "dph", 2, 1, GFX_LT(GFX11) },

2
src/intel/compiler/brw_eu_defines.h
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@@ -223,8 +223,6 @@ enum opcode {
BRW_OPCODE_CBIT,
BRW_OPCODE_ADDC,
BRW_OPCODE_SUBB,
BRW_OPCODE_SAD2,
BRW_OPCODE_SADA2,
BRW_OPCODE_ADD3, /* Gen12+ only */
BRW_OPCODE_DP4,
BRW_OPCODE_DPH,

1
src/intel/compiler/brw_eu_validate.c
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@@ -337,7 +337,6 @@ inst_uses_src_acc(const struct brw_isa_info *isa,
switch (brw_inst_opcode(isa, inst)) {
case BRW_OPCODE_MAC:
case BRW_OPCODE_MACH:
case BRW_OPCODE_SADA2:
return true;
default:
break;

2
src/intel/compiler/brw_fs.cpp
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@@ -503,8 +503,6 @@ fs_inst::can_do_cmod() const
case BRW_OPCODE_RNDE:
case BRW_OPCODE_RNDU:
case BRW_OPCODE_RNDZ:
case BRW_OPCODE_SAD2:
case BRW_OPCODE_SADA2:
case BRW_OPCODE_SHL:
case BRW_OPCODE_SHR:
case BRW_OPCODE_SUBB:

2
src/intel/compiler/brw_fs_builder.h
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@@ -634,8 +634,6 @@ namespace brw {
ALU1(RNDZ)
ALU2(ROL)
ALU2(ROR)
ALU2(SAD2)
ALU2_ACC(SADA2)
ALU2(SEL)
ALU2(SHL)
ALU2(SHR)

1
src/intel/compiler/brw_fs_lower_simd_width.cpp
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@@ -277,7 +277,6 @@ brw_fs_get_lowered_simd_width(const fs_visitor *shader, const fs_inst *inst)
case BRW_OPCODE_FBH:
case BRW_OPCODE_FBL:
case BRW_OPCODE_CBIT:
case BRW_OPCODE_SAD2:
case BRW_OPCODE_MAD:
case BRW_OPCODE_LRP:
case BRW_OPCODE_ADD3:

10
src/intel/compiler/brw_gram.y
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@@ -196,12 +196,6 @@ i965_asm_binary_instruction(int opcode,
case BRW_OPCODE_ROR:
brw_ROR(p, dest, src0, src1);
break;
case BRW_OPCODE_SAD2:
fprintf(stderr, "Opcode BRW_OPCODE_SAD2 unhandled\n");
break;
case BRW_OPCODE_SADA2:
fprintf(stderr, "Opcode BRW_OPCODE_SADA2 unhandled\n");
break;
case BRW_OPCODE_SUBB:
brw_SUBB(p, dest, src0, src1);
break;
@@ -389,7 +383,7 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
%token <integer> OR
%token <integer> PLN POP PUSH
%token <integer> RET RNDD RNDE RNDU RNDZ ROL ROR
%token <integer> SAD2 SADA2 SEL SENDS SENDSC SHL SHR SMOV SUBB SYNC
%token <integer> SEL SENDS SENDSC SHL SHR SMOV SUBB SYNC
%token <integer> SEND_GFX4 SENDC_GFX4 SEND_GFX12 SENDC_GFX12
%token <integer> WAIT WHILE
%token <integer> XOR
@@ -783,8 +777,6 @@ binaryopcodes:
| PLN
| ROL
| ROR
| SAD2
| SADA2
| SUBB
;

2
src/intel/compiler/brw_ir_performance.cpp
View File

@@ -301,8 +301,6 @@ namespace {
case BRW_OPCODE_ROR:
case BRW_OPCODE_ROL:
case BRW_OPCODE_SUBB:
case BRW_OPCODE_SAD2:
case BRW_OPCODE_SADA2:
case BRW_OPCODE_LINE:
case BRW_OPCODE_NOP:
case SHADER_OPCODE_CLUSTER_BROADCAST:

2
src/intel/compiler/brw_lex.l
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@@ -108,8 +108,6 @@ rndu { yylval.integer = BRW_OPCODE_RNDU; return RNDU; }
rndz { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; }
rol { yylval.integer = BRW_OPCODE_ROL; return ROL; }
ror { yylval.integer = BRW_OPCODE_ROR; return ROR; }
sad2 { yylval.integer = BRW_OPCODE_SAD2; return SAD2; }
sada2 { yylval.integer = BRW_OPCODE_SADA2; return SADA2; }
sel { yylval.integer = BRW_OPCODE_SEL; return SEL; }
send {
yylval.integer = BRW_OPCODE_SEND;

1
src/intel/compiler/brw_shader.cpp
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@@ -443,7 +443,6 @@ fs_inst::reads_accumulator_implicitly() const
switch (opcode) {
case BRW_OPCODE_MAC:
case BRW_OPCODE_MACH:
case BRW_OPCODE_SADA2:
return true;
default:
return false;