From f005a2d7862a86cf47846e4311fbad9125a27c16 Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Tue, 31 May 2022 12:49:27 -0700 Subject: [PATCH] freedreno/ir3: Fix validation of half-precision image store values. ce1a381e57d2 ("turnip: enable VK_KHR_16bit_storage on A650") determined that the type of the instr decided the type of the value being stored in the ".b" case. But it would be surprising if image stores had the type determine the coordinates' precision instead of the value's, and once we turned on image instruction precision lowering we ran into asserts. Part-of: --- src/freedreno/ir3/ir3_validate.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/src/freedreno/ir3/ir3_validate.c b/src/freedreno/ir3/ir3_validate.c index 9c6d5ddcd90..335b03a7d9c 100644 --- a/src/freedreno/ir3/ir3_validate.c +++ b/src/freedreno/ir3/ir3_validate.c @@ -331,15 +331,9 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr) validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF)); break; case OPC_STIB: - if (instr->flags & IR3_INSTR_B) { - validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); - validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF)); - validate_reg_size(ctx, instr->srcs[2], instr->cat6.type); - } else { - validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); - validate_reg_size(ctx, instr->srcs[1], instr->cat6.type); - validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF)); - } + validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); + validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF)); + validate_reg_size(ctx, instr->srcs[2], instr->cat6.type); break; case OPC_GETFIBERID: case OPC_GETSPID: