From eff6710aabbc981f9b48066b3a43358cbc00569b Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Mon, 28 Sep 2020 04:16:27 +0200 Subject: [PATCH] radv: Fix RGP Asic CU info for GFX10+. Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_rgp.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_rgp.c b/src/amd/vulkan/radv_rgp.c index 7003cf456b2..77b542c3469 100644 --- a/src/amd/vulkan/radv_rgp.c +++ b/src/amd/vulkan/radv_rgp.c @@ -331,6 +331,7 @@ radv_fill_sqtt_asic_info(struct radv_device *device, struct sqtt_file_chunk_asic_info *chunk) { struct radeon_info *rad_info = &device->physical_device->rad_info; + bool has_wave32 = rad_info->chip_class >= GFX10; chunk->header.chunk_id.type = SQTT_FILE_CHUNK_TYPE_ASIC_INFO; chunk->header.chunk_id.index = 0; @@ -355,15 +356,18 @@ radv_fill_sqtt_asic_info(struct radv_device *device, chunk->device_id = rad_info->pci_id; chunk->device_revision_id = rad_info->pci_rev_id; - chunk->vgprs_per_simd = rad_info->num_physical_wave64_vgprs_per_simd; + chunk->vgprs_per_simd = rad_info->num_physical_wave64_vgprs_per_simd * + (has_wave32 ? 2 : 1); chunk->sgprs_per_simd = rad_info->num_physical_sgprs_per_simd; chunk->shader_engines = rad_info->max_se; - chunk->compute_unit_per_shader_engine = rad_info->min_good_cu_per_sa; + chunk->compute_unit_per_shader_engine = rad_info->min_good_cu_per_sa * + rad_info->max_sh_per_se; chunk->simd_per_compute_unit = rad_info->num_simd_per_compute_unit; chunk->wavefronts_per_simd = rad_info->max_wave64_per_simd; chunk->minimum_vgpr_alloc = rad_info->min_wave64_vgpr_alloc; - chunk->vgpr_alloc_granularity = rad_info->wave64_vgpr_alloc_granularity; + chunk->vgpr_alloc_granularity = rad_info->wave64_vgpr_alloc_granularity * + (has_wave32 ? 2 : 1); chunk->minimum_sgpr_alloc = rad_info->min_sgpr_alloc; chunk->sgpr_alloc_granularity = rad_info->sgpr_alloc_granularity;