intel/fs: Introduce regioning lowering pass.

This legalization pass is meant to handle situations where the source
or destination regioning controls of an instruction are unsupported by
the hardware and need to be lowered away into separate instructions.
This should be more reliable and future-proof than the current
approach of handling CHV/BXT restrictions manually all over the
visitor.  The same mechanism is leveraged to lower unsupported type
conversions easily, which obsoletes the lower_conversions pass.

v2: Give conditional modifiers the same treatment as predicates for
    SEL instructions in lower_dst_modifiers() (Iago).  Special-case a
    couple of other instructions with inconsistent conditional mod
    semantics in lower_dst_modifiers() (Curro).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

src/intel/compiler/brw_fs.h

@@ -164,6 +164,7 @@ public:
    void lower_uniform_pull_constant_loads();
    bool lower_load_payload();
    bool lower_pack();
+   bool lower_regioning();
    bool lower_conversions();
    bool lower_logical_sends();
    bool lower_integer_multiplication();
@@ -536,24 +537,8 @@ namespace brw {
       }
    }
 
-   /**
-    * Remove any modifiers from the \p i-th source region of the instruction,
-    * including negate, abs and any implicit type conversion to the execution
-    * type.  Instead any source modifiers will be implemented as a separate
-    * MOV instruction prior to the original instruction.
-    */
-   inline bool
-   lower_src_modifiers(fs_visitor *v, bblock_t *block, fs_inst *inst, unsigned i)
-   {
-      assert(inst->components_read(i) == 1);
-      const fs_builder ibld(v, block, inst);
-      const fs_reg tmp = ibld.vgrf(get_exec_type(inst));
-
-      ibld.MOV(tmp, inst->src[i]);
-      inst->src[i] = tmp;
-
-      return true;
-   }
+   bool
+   lower_src_modifiers(fs_visitor *v, bblock_t *block, fs_inst *inst, unsigned i);
 }
 
 void shuffle_from_32bit_read(const brw::fs_builder &bld,