From efa27572a15b1bb6ee88d0556c2af06dc501215d Mon Sep 17 00:00:00 2001 From: Anuj Phogat Date: Wed, 3 Jun 2020 11:50:38 -0700 Subject: [PATCH] iris: Enable geometry distribution Using recommended values based on performance studies across a range of workloads. Rework: * Always enable geometry distribution * Set ListCutIndexEnable if primitive restart is enabled * Set distribution mode based on TEEnable v2: - Flag missing IRIS_DIRTY_VFG bit (Ken) Signed-off-by: Anuj Phogat Reviewed-by: Sagar Ghuge Reviewed-by: Jordan Justen Reviewed-by: Kenneth Graunke Part-of: --- src/gallium/drivers/iris/iris_context.h | 1 + src/gallium/drivers/iris/iris_draw.c | 6 ++++- src/gallium/drivers/iris/iris_program.c | 5 ++++- src/gallium/drivers/iris/iris_state.c | 30 +++++++++++++++++++++++++ 4 files changed, 40 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index 7239fb3cfc4..22e679c294e 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -115,6 +115,7 @@ enum { #define IRIS_DIRTY_VERTEX_BUFFER_FLUSHES (1ull << 32) #define IRIS_DIRTY_RENDER_MISC_BUFFER_FLUSHES (1ull << 33) #define IRIS_DIRTY_COMPUTE_MISC_BUFFER_FLUSHES (1ull << 34) +#define IRIS_DIRTY_VFG (1ull << 35) #define IRIS_ALL_DIRTY_FOR_COMPUTE (IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES | \ IRIS_DIRTY_COMPUTE_MISC_BUFFER_FLUSHES) diff --git a/src/gallium/drivers/iris/iris_draw.c b/src/gallium/drivers/iris/iris_draw.c index 8a1606427c1..35c5ead40a7 100644 --- a/src/gallium/drivers/iris/iris_draw.c +++ b/src/gallium/drivers/iris/iris_draw.c @@ -65,6 +65,7 @@ iris_update_draw_info(struct iris_context *ice, const struct pipe_draw_info *info) { struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen; + const struct intel_device_info *devinfo = &screen->devinfo; const struct brw_compiler *compiler = screen->compiler; if (ice->state.prim_mode != info->mode) { @@ -105,8 +106,11 @@ iris_update_draw_info(struct iris_context *ice, if (ice->state.primitive_restart != info->primitive_restart || ice->state.cut_index != cut_index) { ice->state.dirty |= IRIS_DIRTY_VF; - ice->state.primitive_restart = info->primitive_restart; ice->state.cut_index = cut_index; + ice->state.dirty |= + ((ice->state.primitive_restart != info->primitive_restart) && + devinfo->verx10 >= 125) ? IRIS_DIRTY_VFG : 0; + ice->state.primitive_restart = info->primitive_restart; } } diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index af1c9a2dd71..71c4712c73c 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -2844,10 +2844,13 @@ static void iris_bind_tes_state(struct pipe_context *ctx, void *state) { struct iris_context *ice = (struct iris_context *)ctx; + struct iris_screen *screen = (struct iris_screen *) ctx->screen; + const struct intel_device_info *devinfo = &screen->devinfo; /* Enabling/disabling optional stages requires a URB reconfiguration. */ if (!!state != !!ice->shaders.uncompiled[MESA_SHADER_TESS_EVAL]) - ice->state.dirty |= IRIS_DIRTY_URB; + ice->state.dirty |= IRIS_DIRTY_URB | (devinfo->verx10 >= 125 ? + IRIS_DIRTY_VFG : 0); bind_shader_state((void *) ctx, state, MESA_SHADER_TESS_EVAL); } diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 30a2f4b57e1..c2e996a61df 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -6586,6 +6586,9 @@ iris_upload_dirty_render_state(struct iris_context *ice, if (dirty & IRIS_DIRTY_VF) { iris_emit_cmd(batch, GENX(3DSTATE_VF), vf) { +#if GFX_VERx10 >= 125 + vf.GeometryDistributionEnable = true; +#endif if (draw->primitive_restart) { vf.IndexedDrawCutIndexEnable = true; vf.CutIndex = draw->restart_index; @@ -6593,6 +6596,33 @@ iris_upload_dirty_render_state(struct iris_context *ice, } } +#if GFX_VERx10 >= 125 + if (dirty & IRIS_DIRTY_VFG) { + iris_emit_cmd(batch, GENX(3DSTATE_VFG), vfg) { + /* If 3DSTATE_TE: TE Enable == 1 then RR_STRICT else RR_FREE*/ + vfg.DistributionMode = + ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL ? RR_STRICT : + RR_FREE; + vfg.DistributionGranularity = BatchLevelGranularity; + vfg.ListCutIndexEnable = draw->primitive_restart; + /* 192 vertices for TRILIST_ADJ */ + vfg.ListNBatchSizeScale = 0; + /* Batch size of 384 vertices */ + vfg.List3BatchSizeScale = 2; + /* Batch size of 128 vertices */ + vfg.List2BatchSizeScale = 1; + /* Batch size of 128 vertices */ + vfg.List1BatchSizeScale = 2; + /* Batch size of 256 vertices for STRIP topologies */ + vfg.StripBatchSizeScale = 3; + /* 192 control points for PATCHLIST_3 */ + vfg.PatchBatchSizeScale = 1; + /* 192 control points for PATCHLIST_3 */ + vfg.PatchBatchSizeMultiplier = 31; + } + } +#endif + if (dirty & IRIS_DIRTY_VF_STATISTICS) { iris_emit_cmd(batch, GENX(3DSTATE_VF_STATISTICS), vf) { vf.StatisticsEnable = true;