From ee11b473b5aa3690715cf87f5e24e6d5ec2d0bd8 Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Mon, 23 Oct 2023 10:48:18 -0500 Subject: [PATCH] nak: Implement read_invocation and shuffle_* Part-of: --- src/nouveau/compiler/nak_from_nir.rs | 31 ++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/src/nouveau/compiler/nak_from_nir.rs b/src/nouveau/compiler/nak_from_nir.rs index 41ad9e4d7ff..c294e9d0334 100644 --- a/src/nouveau/compiler/nak_from_nir.rs +++ b/src/nouveau/compiler/nak_from_nir.rs @@ -1864,6 +1864,37 @@ impl<'a> ShaderFromNir<'a> { _ => panic!("Unhandled execution scope"), } } + nir_intrinsic_read_invocation + | nir_intrinsic_shuffle + | nir_intrinsic_shuffle_down + | nir_intrinsic_shuffle_up + | nir_intrinsic_shuffle_xor => { + assert!(srcs[0].bit_size() == 32); + assert!(srcs[0].num_components() == 1); + let data = self.get_src(&srcs[0]); + + assert!(srcs[1].bit_size() == 32); + let idx = self.get_src(&srcs[1]); + + assert!(intrin.def.bit_size() == 32); + let dst = b.alloc_ssa(RegFile::GPR, 1); + + b.push_op(OpShfl { + dst: dst.into(), + src: data, + lane: idx, + c: 0x1f.into(), + op: match intrin.intrinsic { + nir_intrinsic_read_invocation + | nir_intrinsic_shuffle => ShflOp::Idx, + nir_intrinsic_shuffle_down => ShflOp::Down, + nir_intrinsic_shuffle_up => ShflOp::Up, + nir_intrinsic_shuffle_xor => ShflOp::Bfly, + _ => panic!("Unknown vote intrinsic"), + }, + }); + self.set_dst(&intrin.def, dst); + } nir_intrinsic_shared_atomic => { let bit_size = intrin.def.bit_size(); let (addr, offset) = self.get_io_addr_offset(&srcs[0], 24);