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nir: Drop most instances of nir_ssa_dest_init()

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Generated using the following two semantic patches:

    @@
    expression I, J, NC, BS;
    @@

    -nir_ssa_dest_init(I, &J->dest, NC, BS);
    +nir_def_init(I, &J->dest.ssa, NC, BS);

    @@
    expression I, J, NC, BS;
    @@

    -nir_ssa_dest_init(I, &J->dest.dest, NC, BS);
    +nir_def_init(I, &J->dest.dest.ssa, NC, BS);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24658>
This commit is contained in:
Faith Ekstrand
2023-08-12 18:31:52 -05:00
committed by Marge Bot
parent 7bcbfae87c
commit ed9affa02f
107 changed files with 333 additions and 360 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/intel/compiler/brw_kernel.c
View File

@@ -110,7 +110,7 @@ implement_sub_group_ballot_builtin(nir_function *func)
nir_intrinsic_instr_create(b.shader, nir_intrinsic_ballot);
ballot->src[0] = nir_src_for_ssa(cond);
ballot->num_components = 1;
nir_ssa_dest_init(&ballot->instr, &ballot->dest, 1, 32);
nir_def_init(&ballot->instr, &ballot->dest.ssa, 1, 32);
nir_builder_instr_insert(&b, &ballot->instr);
nir_store_deref(&b, ret, &ballot->dest.ssa, ~0);
@@ -182,9 +182,9 @@ lower_kernel_intrinsics(nir_shader *nir)
load->src[0] = nir_src_for_ssa(nir_u2u32(&b, intrin->src[0].ssa));
nir_intrinsic_set_base(load, kernel_arg_start);
nir_intrinsic_set_range(load, nir->num_uniforms);
nir_ssa_dest_init(&load->instr, &load->dest,
intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size);
nir_def_init(&load->instr, &load->dest.ssa,
intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size);
nir_builder_instr_insert(&b, &load->instr);
nir_def_rewrite_uses(&intrin->dest.ssa, &load->dest.ssa);
@@ -212,7 +212,7 @@ lower_kernel_intrinsics(nir_shader *nir)
nir_intrinsic_set_base(load, kernel_sysvals_start +
offsetof(struct brw_kernel_sysvals, num_work_groups));
nir_intrinsic_set_range(load, 3 * 4);
nir_ssa_dest_init(&load->instr, &load->dest, 3, 32);
nir_def_init(&load->instr, &load->dest.ssa, 3, 32);
nir_builder_instr_insert(&b, &load->instr);
/* We may need to do a bit-size cast here */

2
src/intel/compiler/brw_nir.c
View File

@@ -328,7 +328,7 @@ brw_nir_lower_vs_inputs(nir_shader *nir,
}
load->num_components = 1;
nir_ssa_dest_init(&load->instr, &load->dest, 1, 32);
nir_def_init(&load->instr, &load->dest.ssa, 1, 32);
nir_builder_instr_insert(&b, &load->instr);
nir_def_rewrite_uses(&intrin->dest.ssa,

8
src/intel/compiler/brw_nir_lower_sparse.c
View File

@@ -156,8 +156,8 @@ lower_sparse_image_load(nir_builder *b, nir_intrinsic_instr *intrin)
tex->src[2].src_type = nir_tex_src_lod;
tex->src[2].src = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&tex->instr, &tex->dest, 5,
nir_dest_bit_size(intrin->dest));
nir_def_init(&tex->instr, &tex->dest.ssa, 5,
nir_dest_bit_size(intrin->dest));
nir_builder_instr_insert(b, &tex->instr);
@@ -175,8 +175,8 @@ lower_tex_compare(nir_builder *b, nir_tex_instr *tex, int compare_idx)
/* Clone the original instruction */
nir_tex_instr *sparse_tex = nir_instr_as_tex(nir_instr_clone(b->shader, &tex->instr));
nir_ssa_dest_init(&sparse_tex->instr, &sparse_tex->dest,
tex->dest.ssa.num_components, tex->dest.ssa.bit_size);
nir_def_init(&sparse_tex->instr, &sparse_tex->dest.ssa,
tex->dest.ssa.num_components, tex->dest.ssa.bit_size);
nir_builder_instr_insert(b, &sparse_tex->instr);
/* Drop the compare source on the cloned instruction */

2
src/intel/compiler/brw_nir_lower_storage_image.c
View File

@@ -51,7 +51,7 @@ _load_image_param(nir_builder *b, nir_deref_instr *deref, unsigned offset)
default:
unreachable("Invalid param offset");
}
nir_ssa_dest_init(&load->instr, &load->dest, load->num_components, 32);
nir_def_init(&load->instr, &load->dest.ssa, load->num_components, 32);
nir_builder_instr_insert(b, &load->instr);
return &load->dest.ssa;

4
src/intel/compiler/brw_nir_opt_peephole_ffma.c
View File

@@ -232,8 +232,8 @@ brw_nir_opt_peephole_ffma_instr(nir_builder *b,
}
nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src], ffma);
nir_ssa_dest_init(&ffma->instr, &ffma->dest.dest,
add->dest.dest.ssa.num_components, bit_size);
nir_def_init(&ffma->instr, &ffma->dest.dest.ssa,
add->dest.dest.ssa.num_components, bit_size);
nir_def_rewrite_uses(&add->dest.dest.ssa, &ffma->dest.dest.ssa);
nir_builder_instr_insert(b, &ffma->instr);

4
src/intel/compiler/brw_nir_opt_peephole_imul32x16.c
View File

@@ -45,8 +45,8 @@ replace_imul_instr(nir_builder *b, nir_alu_instr *imul, unsigned small_val,
nir_alu_src_copy(&imul_32x16->src[0], &imul->src[1 - small_val], imul_32x16);
nir_alu_src_copy(&imul_32x16->src[1], &imul->src[small_val], imul_32x16);
nir_ssa_dest_init(&imul_32x16->instr, &imul_32x16->dest.dest,
imul->dest.dest.ssa.num_components, 32);
nir_def_init(&imul_32x16->instr, &imul_32x16->dest.dest.ssa,
imul->dest.dest.ssa.num_components, 32);
nir_def_rewrite_uses(&imul->dest.dest.ssa,
&imul_32x16->dest.dest.ssa);