zink: reorganize zink_gfx_pipeline_state a little

this is more optimal for library-based hashing

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17225>
This commit is contained in:
Mike Blumenkrantz
2022-06-23 17:02:15 -04:00
committed by Marge Bot
parent 5b7eb0d9d3
commit ed733d934e
2 changed files with 21 additions and 5 deletions

View File

@@ -54,10 +54,12 @@ struct zink_pipeline_dynamic_state2 {
struct zink_gfx_pipeline_state { struct zink_gfx_pipeline_state {
uint32_t rast_state : ZINK_RAST_HW_STATE_SIZE; //zink_rasterizer_hw_state uint32_t rast_state : ZINK_RAST_HW_STATE_SIZE; //zink_rasterizer_hw_state
uint32_t rast_samples:15; //9 extra bits uint32_t _pad1 : 6;
uint32_t force_persample_interp:1; //duplicated for gpl hashing
/* order matches zink_gfx_output_key: uint16_t offset */
uint32_t rast_samples:8; //2 extra bits
uint32_t void_alpha_attachments:PIPE_MAX_COLOR_BUFS; uint32_t void_alpha_attachments:PIPE_MAX_COLOR_BUFS;
VkSampleMask sample_mask; VkSampleMask sample_mask;
unsigned rp_state; unsigned rp_state;
uint32_t blend_id; uint32_t blend_id;
@@ -70,18 +72,32 @@ struct zink_gfx_pipeline_state {
struct zink_pipeline_dynamic_state2 dyn_state2; struct zink_pipeline_dynamic_state2 dyn_state2;
#if VK_USE_64_BIT_PTR_DEFINES
uint32_t _pad;
#endif
uint32_t gkey; //for pipeline library lookups
VkShaderModule modules[PIPE_SHADER_TYPES - 1]; VkShaderModule modules[PIPE_SHADER_TYPES - 1];
bool modules_changed; bool modules_changed;
struct zink_vertex_elements_hw_state *element_state;
uint32_t vertex_hash; uint32_t vertex_hash;
uint32_t final_hash; uint32_t final_hash;
#if VK_USE_64_BIT_PTR_DEFINES
uint32_t _pad2;
#endif
/* order matches zink_gfx_input_key */
union {
struct {
unsigned idx:8;
bool uses_dynamic_stride;
};
uint32_t input;
};
uint32_t vertex_buffers_enabled_mask; uint32_t vertex_buffers_enabled_mask;
uint32_t vertex_strides[PIPE_MAX_ATTRIBS]; uint32_t vertex_strides[PIPE_MAX_ATTRIBS];
struct zink_vertex_elements_hw_state *element_state;
bool sample_locations_enabled; bool sample_locations_enabled;
bool uses_dynamic_stride;
bool have_EXT_extended_dynamic_state; bool have_EXT_extended_dynamic_state;
bool have_EXT_extended_dynamic_state2; bool have_EXT_extended_dynamic_state2;
bool extendedDynamicState2PatchControlPoints; bool extendedDynamicState2PatchControlPoints;
@@ -96,7 +112,6 @@ struct zink_gfx_pipeline_state {
VkFormat rendering_formats[PIPE_MAX_COLOR_BUFS]; VkFormat rendering_formats[PIPE_MAX_COLOR_BUFS];
VkPipelineRenderingCreateInfo rendering_info; VkPipelineRenderingCreateInfo rendering_info;
VkPipeline pipeline; VkPipeline pipeline;
unsigned idx : 8;
enum pipe_prim_type gfx_prim_mode; //pending mode enum pipe_prim_type gfx_prim_mode; //pending mode
}; };

View File

@@ -676,6 +676,7 @@ zink_bind_rasterizer_state(struct pipe_context *pctx, void *cso)
if (ctx->rast_state->base.force_persample_interp != force_persample_interp) if (ctx->rast_state->base.force_persample_interp != force_persample_interp)
zink_set_fs_key(ctx)->force_persample_interp = ctx->rast_state->base.force_persample_interp; zink_set_fs_key(ctx)->force_persample_interp = ctx->rast_state->base.force_persample_interp;
ctx->gfx_pipeline_state.force_persample_interp = ctx->rast_state->base.force_persample_interp;
} }
} }