From ecd4517560f135f64abf6e40acc48807b400ca41 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tapani=20P=C3=A4lli?= <tapani.palli@intel.com>
Date: Thu, 10 Nov 2022 18:23:21 +0200
Subject: [PATCH] anv: setup stage bitmask for Wa_22011440098
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Fixes: 40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
---
 src/intel/vulkan/genX_cmd_buffer.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index c47eb877b90..fdbe070b927 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -2295,6 +2295,8 @@ cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
     */
    if (intel_device_info_is_dg2(cmd_buffer->device->info)) {
       anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CONSTANT_ALL), c) {
+         /* Update empty push constants for all stages (bitmask = 11111b) */
+         c.ShaderUpdateEnable = 0x1f;
          c.MOCS = anv_mocs(cmd_buffer->device, NULL, 0);
       }
    }