radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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@@ -3568,8 +3568,6 @@ radv_pipeline_generate_hw_gs(struct radeon_cmdbuf *ctx_cs,
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offset += num_components[3] * gs_max_out_vertices;
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offset += num_components[3] * gs_max_out_vertices;
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radeon_set_context_reg(ctx_cs, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset);
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radeon_set_context_reg(ctx_cs, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset);
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radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT, gs->info.gs.vertices_out);
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radeon_set_context_reg_seq(ctx_cs, R_028B5C_VGT_GS_VERT_ITEMSIZE, 4);
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radeon_set_context_reg_seq(ctx_cs, R_028B5C_VGT_GS_VERT_ITEMSIZE, 4);
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radeon_emit(ctx_cs, num_components[0]);
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radeon_emit(ctx_cs, num_components[0]);
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radeon_emit(ctx_cs, (max_stream >= 1) ? num_components[1] : 0);
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radeon_emit(ctx_cs, (max_stream >= 1) ? num_components[1] : 0);
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@@ -3631,6 +3629,9 @@ radv_pipeline_generate_geometry_shader(struct radeon_cmdbuf *ctx_cs,
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radv_pipeline_generate_hw_ngg(ctx_cs, cs, pipeline, gs, ngg_state);
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radv_pipeline_generate_hw_ngg(ctx_cs, cs, pipeline, gs, ngg_state);
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else
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else
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radv_pipeline_generate_hw_gs(ctx_cs, cs, pipeline, gs, gs_state);
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radv_pipeline_generate_hw_gs(ctx_cs, cs, pipeline, gs, gs_state);
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radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT,
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gs->info.gs.vertices_out);
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}
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}
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static uint32_t offset_to_ps_input(uint32_t offset, bool flat_shade, bool float16)
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static uint32_t offset_to_ps_input(uint32_t offset, bool flat_shade, bool float16)
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