From eca63c5e5c4688e46bf2408fc28b9407c401a6fb Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Thu, 27 Oct 2022 21:57:58 +0800 Subject: [PATCH] radeonsi: move param assign offset to si_get_nir_shader MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We need this info for gfx11 param export soon and nir vertex export lowering in the future. Acked-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Marek Olšák Signed-off-by: Qiang Yu Part-of: --- src/gallium/drivers/radeonsi/si_shader.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 0de46e546a7..c43ffe084b1 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1836,6 +1836,10 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader, bool *free_nir, bool opt_offsets = si_lower_io_to_mem(shader, nir, tcs_vgpr_only_inputs); + /* Assign param export indices. */ + if (is_last_vgt_stage) + si_assign_param_offsets(nir, shader); + if (progress2 || opt_offsets) si_nir_opts(sel->screen, nir, false); @@ -1882,14 +1886,6 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi bool free_nir; struct nir_shader *nir = si_get_nir_shader(shader, &free_nir, 0); - /* Assign param export indices. */ - if ((sel->stage == MESA_SHADER_VERTEX || - sel->stage == MESA_SHADER_TESS_EVAL || - (sel->stage == MESA_SHADER_GEOMETRY && shader->key.ge.as_ngg)) && - !shader->key.ge.as_ls && !shader->key.ge.as_es) { - si_assign_param_offsets(nir, shader); - } - struct pipe_stream_output_info so = {}; if (si_shader_uses_streamout(shader)) nir_gather_stream_output_info(nir, &so);