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anv/pipeline: Set StencilBufferWriteEnable from the pipeline

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The hardware docs say that StencilBufferWriteEnable should only be set if
StencilTestEnable is set.  It seems reasonable to set them together.
This commit is contained in:
Jason Ekstrand
2016-03-04 10:45:24 -08:00
parent fcd8e57185
commit ec18fef88d
4 changed files with 2 additions and 6 deletions
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3
src/intel/vulkan/gen7_cmd_buffer.c
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@@ -581,9 +581,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
.StencilBufferWriteEnable = d->stencil_write_mask.front != 0 ||
d->stencil_write_mask.back != 0,
.StencilTestMask = d->stencil_compare_mask.front & 0xff,
.StencilWriteMask = d->stencil_write_mask.front & 0xff,