gallium: Add MULTISAMPLE_Z_RESOLVE cap
Resolving a multisampled depth texture into a single sampled texture is supported on >= SM4.1 hw. It is possible some previous hw support it. The ability was tested on radeonsi and nvc0. Apparently is is also supported for radeon >= r700. This patch adds the MULTISAMPLE_Z_RESOLVE cap and add it to the drivers. It is advertised for drivers for which it is sure the ability is supported. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Axel Davy <axel.davy@ens.fr>
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@@ -243,6 +243,9 @@ The integer capabilities:
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this, at least BASEVERTEX should be exposed separately too).
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* ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
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for ``pipe_rasterizer_state::offset_clamp``.
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* ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
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a multisampled depth buffer into a single-sampled texture (or depth buffer).
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Only the first sampled should be copied.
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.. _pipe_capf:
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@@ -230,6 +230,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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case PIPE_CAP_MAX_VIEWPORTS:
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@@ -228,6 +228,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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@@ -470,6 +470,7 @@ ilo_get_param(struct pipe_screen *screen, enum pipe_cap param)
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case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
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case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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case PIPE_CAP_VENDOR_ID:
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@@ -287,6 +287,8 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
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return 0;
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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return 1;
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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}
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/* should only get here on unhandled cases */
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debug_printf("Unexpected PIPE_CAP %d query\n", param);
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@@ -159,6 +159,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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case PIPE_CAP_VENDOR_ID:
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@@ -207,6 +207,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_COMPUTE:
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case PIPE_CAP_DRAW_INDIRECT:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: /* potentially supported on some hw */
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return 0;
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case PIPE_CAP_VENDOR_ID:
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@@ -173,6 +173,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 1;
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case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
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@@ -183,6 +183,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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/* SWTCL-only features. */
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@@ -401,6 +401,8 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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return rscreen->b.info.vram_size >> 20;
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case PIPE_CAP_UMA:
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return 0;
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return rscreen->b.chip_class >= R700;
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}
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return 0;
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}
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@@ -229,6 +229,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 1;
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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@@ -235,6 +235,8 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
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return 0;
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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return 0;
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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}
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/* should only get here on unhandled cases */
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debug_printf("Unexpected PIPE_CAP %d query\n", param);
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@@ -284,6 +284,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
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return 64;
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@@ -171,6 +171,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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return 0;
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/* Stream output. */
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@@ -574,6 +574,7 @@ enum pipe_cap {
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PIPE_CAP_CLIP_HALFZ = 111,
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PIPE_CAP_VERTEXID_NOBASE = 112,
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PIPE_CAP_POLYGON_OFFSET_CLAMP = 113,
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PIPE_CAP_MULTISAMPLE_Z_RESOLVE = 114,
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};
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#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
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