diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 77447969dab..bb88d1064a6 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3850,7 +3850,6 @@ radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer,
 	radv_set_descriptor_set(cmd_buffer, bind_point, set, idx);
 
 	assert(set);
-	assert(!(set->layout->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR));
 
 	if (!cmd_buffer->device->use_global_bo_list) {
 		for (unsigned j = 0; j < set->buffer_count; ++j)
@@ -3891,7 +3890,7 @@ void radv_CmdBindDescriptorSets(
 			radv_bind_descriptor_set(cmd_buffer, pipelineBindPoint, set, idx);
 		}
 
-		for(unsigned j = 0; j < set->layout->dynamic_offset_count; ++j, ++dyn_idx) {
+		for(unsigned j = 0; j < layout->set[idx].dynamic_offset_count; ++j, ++dyn_idx) {
 			unsigned idx = j + layout->set[i + firstSet].dynamic_offset_start;
 			uint32_t *dst = descriptors_state->dynamic_buffers + idx * 4;
 			assert(dyn_idx < dynamicOffsetCount);
@@ -3920,8 +3919,7 @@ void radv_CmdBindDescriptorSets(
 				}
 			}
 
-			cmd_buffer->push_constant_stages |=
-			                     set->layout->dynamic_shader_stages;
+			cmd_buffer->push_constant_stages |= layout->set[idx].dynamic_offset_stages;
 		}
 	}
 }
diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c
index be7897265f9..9dd491a32a0 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -439,10 +439,16 @@ VkResult radv_CreatePipelineLayout(
 		layout->set[set].layout = set_layout;
 
 		layout->set[set].dynamic_offset_start = dynamic_offset_count;
+		layout->set[set].dynamic_offset_count = 0;
+		layout->set[set].dynamic_offset_stages = 0;
+
 		for (uint32_t b = 0; b < set_layout->binding_count; b++) {
-			dynamic_offset_count += set_layout->binding[b].array_size * set_layout->binding[b].dynamic_offset_count;
-			dynamic_shader_stages |= set_layout->dynamic_shader_stages;
+			layout->set[set].dynamic_offset_count +=
+				set_layout->binding[b].array_size * set_layout->binding[b].dynamic_offset_count;
+			layout->set[set].dynamic_offset_stages |= set_layout->dynamic_shader_stages;
 		}
+		dynamic_offset_count += layout->set[set].dynamic_offset_count;
+		dynamic_shader_stages |= layout->set[set].dynamic_offset_stages;
 		_mesa_sha1_update(&ctx, set_layout, set_layout->layout_size);
 	}
 
diff --git a/src/amd/vulkan/radv_descriptor_set.h b/src/amd/vulkan/radv_descriptor_set.h
index ee213fbb6a0..fdaaca07318 100644
--- a/src/amd/vulkan/radv_descriptor_set.h
+++ b/src/amd/vulkan/radv_descriptor_set.h
@@ -89,7 +89,9 @@ struct radv_pipeline_layout {
    struct {
       struct radv_descriptor_set_layout *layout;
       uint32_t size;
-      uint32_t dynamic_offset_start;
+      uint16_t dynamic_offset_start;
+      uint16_t dynamic_offset_count;
+      VkShaderStageFlags dynamic_offset_stages;
    } set[MAX_SETS];
 
    uint32_t num_sets;