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radv: Add noatocdithering option to RADV_DEBUG

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Was useful in testing a difference between D3D and VK ATOC rendering earlier today, would be nice to check this more easily in future.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13069>
This commit is contained in:
Joshua Ashton
2021-09-27 22:41:23 +01:00
committed by Marge Bot
parent daa8a81d99
commit eb06e6e6cd
4 changed files with 16 additions and 3 deletions
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2
docs/envvars.rst
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@@ -581,6 +581,8 @@ RADV driver environment variables
class of application bugs appearing as flickering. class of application bugs appearing as flickering.
``metashaders`` ``metashaders``
dump internal meta shaders dump internal meta shaders
``noatocdithering``
disable dithering for alpha to coverage
``nobinning`` ``nobinning``
disable primitive binning disable primitive binning
``nocache`` ``nocache``

1
src/amd/vulkan/radv_debug.h
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@@ -62,6 +62,7 @@ enum {
RADV_DEBUG_NO_DISPLAY_DCC = 1ull << 31, RADV_DEBUG_NO_DISPLAY_DCC = 1ull << 31,
RADV_DEBUG_NO_TC_COMPAT_CMASK = 1ull << 32, RADV_DEBUG_NO_TC_COMPAT_CMASK = 1ull << 32,
RADV_DEBUG_NO_VRS_FLAT_SHADING = 1ull << 33, RADV_DEBUG_NO_VRS_FLAT_SHADING = 1ull << 33,
RADV_DEBUG_NO_ATOC_DITHERING = 1ull << 34,
}; };
enum { enum {

1
src/amd/vulkan/radv_device.c
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@@ -823,6 +823,7 @@ static const struct debug_control radv_debug_options[] = {
{"nodisplaydcc", RADV_DEBUG_NO_DISPLAY_DCC}, {"nodisplaydcc", RADV_DEBUG_NO_DISPLAY_DCC},
{"notccompatcmask", RADV_DEBUG_NO_TC_COMPAT_CMASK}, {"notccompatcmask", RADV_DEBUG_NO_TC_COMPAT_CMASK},
{"novrsflatshading", RADV_DEBUG_NO_VRS_FLAT_SHADING}, {"novrsflatshading", RADV_DEBUG_NO_VRS_FLAT_SHADING},
{"noatocdithering", RADV_DEBUG_NO_ATOC_DITHERING},
{NULL, 0}}; {NULL, 0}};
const char * const char *

15
src/amd/vulkan/radv_pipeline.c
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@@ -639,9 +639,18 @@ radv_pipeline_init_blend_state(struct radv_pipeline *pipeline,
cb_color_control |= S_028808_ROP3(V_028808_ROP3_COPY); cb_color_control |= S_028808_ROP3(V_028808_ROP3_COPY);
} }
blend.db_alpha_to_mask = S_028B70_ALPHA_TO_MASK_OFFSET0(3) | S_028B70_ALPHA_TO_MASK_OFFSET1(1) | if (pipeline->device->instance->debug_flags & RADV_DEBUG_NO_ATOC_DITHERING)
S_028B70_ALPHA_TO_MASK_OFFSET2(0) | S_028B70_ALPHA_TO_MASK_OFFSET3(2) | {
S_028B70_OFFSET_ROUND(1); blend.db_alpha_to_mask = S_028B70_ALPHA_TO_MASK_OFFSET0(2) | S_028B70_ALPHA_TO_MASK_OFFSET1(2) |
S_028B70_ALPHA_TO_MASK_OFFSET2(2) | S_028B70_ALPHA_TO_MASK_OFFSET3(2) |
S_028B70_OFFSET_ROUND(0);
}
else
{
blend.db_alpha_to_mask = S_028B70_ALPHA_TO_MASK_OFFSET0(3) | S_028B70_ALPHA_TO_MASK_OFFSET1(1) |
S_028B70_ALPHA_TO_MASK_OFFSET2(0) | S_028B70_ALPHA_TO_MASK_OFFSET3(2) |
S_028B70_OFFSET_ROUND(1);
}
if (vkms && vkms->alphaToCoverageEnable) { if (vkms && vkms->alphaToCoverageEnable) {
blend.db_alpha_to_mask |= S_028B70_ALPHA_TO_MASK_ENABLE(1); blend.db_alpha_to_mask |= S_028B70_ALPHA_TO_MASK_ENABLE(1);