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radv: use the hardware primitive topology everywhere

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Instead of mixing the VK type vs HW type everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
This commit is contained in:
Samuel Pitoiset
2022-04-14 14:32:17 +02:00
committed by Marge Bot
parent 984b6c037c
commit ea6eaa4c19
2 changed files with 39 additions and 38 deletions
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50
src/amd/vulkan/radv_pipeline.c
View File

@@ -1247,21 +1247,21 @@ gfx103_pipeline_init_vrs_state(struct radv_pipeline *pipeline,
} }
static bool static bool
radv_prim_can_use_guardband(enum VkPrimitiveTopology topology) radv_prim_can_use_guardband(uint32_t topology)
{ {
switch (topology) { switch (topology) {
case VK_PRIMITIVE_TOPOLOGY_POINT_LIST: case V_008958_DI_PT_POINTLIST:
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST: case V_008958_DI_PT_LINELIST:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP: case V_008958_DI_PT_LINESTRIP:
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_LINELIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_LINESTRIP_ADJ:
return false; return false;
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST: case V_008958_DI_PT_TRILIST:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP: case V_008958_DI_PT_TRISTRIP:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN: case V_008958_DI_PT_TRIFAN:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_TRILIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_TRISTRIP_ADJ:
case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST: case V_008958_DI_PT_PATCH:
return true; return true;
default: default:
unreachable("unhandled primitive type"); unreachable("unhandled primitive type");
@@ -1554,7 +1554,8 @@ radv_pipeline_init_input_assembly_state(struct radv_pipeline *pipeline,
struct radv_shader *tes = pipeline->shaders[MESA_SHADER_TESS_EVAL]; struct radv_shader *tes = pipeline->shaders[MESA_SHADER_TESS_EVAL];
struct radv_shader *gs = pipeline->shaders[MESA_SHADER_GEOMETRY]; struct radv_shader *gs = pipeline->shaders[MESA_SHADER_GEOMETRY];
pipeline->graphics.can_use_guardband = radv_prim_can_use_guardband(ia_state->topology); pipeline->graphics.can_use_guardband =
radv_prim_can_use_guardband(si_translate_prim(ia_state->topology));
if (radv_pipeline_has_gs(pipeline)) { if (radv_pipeline_has_gs(pipeline)) {
if (si_conv_gl_prim_to_gs_out(gs->info.gs.output_prim) == V_028A6C_TRISTRIP) if (si_conv_gl_prim_to_gs_out(gs->info.gs.output_prim) == V_028A6C_TRISTRIP)
@@ -1939,10 +1940,10 @@ gfx9_get_gs_info(const struct radv_pipeline_key *key, const struct radv_pipeline
unsigned gs_num_invocations = MAX2(gs_info->gs.invocations, 1); unsigned gs_num_invocations = MAX2(gs_info->gs.invocations, 1);
bool uses_adjacency; bool uses_adjacency;
switch (key->vs.topology) { switch (key->vs.topology) {
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_LINELIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_LINESTRIP_ADJ:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_TRILIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_TRISTRIP_ADJ:
uses_adjacency = true; uses_adjacency = true;
break; break;
default: default:
@@ -2151,10 +2152,10 @@ gfx10_get_ngg_info(const struct radv_pipeline_key *key, struct radv_pipeline *pi
unsigned gs_num_invocations = stages[MESA_SHADER_GEOMETRY].nir ? MAX2(gs_info->gs.invocations, 1) : 1; unsigned gs_num_invocations = stages[MESA_SHADER_GEOMETRY].nir ? MAX2(gs_info->gs.invocations, 1) : 1;
bool uses_adjacency; bool uses_adjacency;
switch (key->vs.topology) { switch (key->vs.topology) {
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_LINELIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_LINESTRIP_ADJ:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_TRILIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_TRISTRIP_ADJ:
uses_adjacency = true; uses_adjacency = true;
break; break;
default: default:
@@ -2707,7 +2708,7 @@ radv_link_shaders(struct radv_pipeline *pipeline,
ordered_shaders[i - 1]->info.inputs_read & VARYING_BIT_PSIZ; ordered_shaders[i - 1]->info.inputs_read & VARYING_BIT_PSIZ;
bool topology_uses_psiz = bool topology_uses_psiz =
info->stage == pipeline->graphics.last_vgt_api_stage && info->stage == pipeline->graphics.last_vgt_api_stage &&
((info->stage == MESA_SHADER_VERTEX && pipeline_key->vs.topology == VK_PRIMITIVE_TOPOLOGY_POINT_LIST) || ((info->stage == MESA_SHADER_VERTEX && pipeline_key->vs.topology == V_008958_DI_PT_POINTLIST) ||
(info->stage == MESA_SHADER_TESS_EVAL && info->tess.point_mode) || (info->stage == MESA_SHADER_TESS_EVAL && info->tess.point_mode) ||
(info->stage == MESA_SHADER_GEOMETRY && info->gs.output_primitive == SHADER_PRIM_POINTS) || (info->stage == MESA_SHADER_GEOMETRY && info->gs.output_primitive == SHADER_PRIM_POINTS) ||
(info->stage == MESA_SHADER_MESH && info->mesh.primitive_type == SHADER_PRIM_POINTS)); (info->stage == MESA_SHADER_MESH && info->mesh.primitive_type == SHADER_PRIM_POINTS));
@@ -3058,7 +3059,8 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline,
key.ps.is_int10 = blend->col_format_is_int10; key.ps.is_int10 = blend->col_format_is_int10;
} }
key.vs.topology = pCreateInfo->pInputAssemblyState ? pCreateInfo->pInputAssemblyState->topology : 0; key.vs.topology =
pCreateInfo->pInputAssemblyState ? si_translate_prim(pCreateInfo->pInputAssemblyState->topology) : 0;
if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) {
const VkPipelineRasterizationStateCreateInfo *raster_info = pCreateInfo->pRasterizationState; const VkPipelineRasterizationStateCreateInfo *raster_info = pCreateInfo->pRasterizationState;
@@ -6456,7 +6458,7 @@ radv_pipeline_init_vgt_gs_out(struct radv_pipeline *pipeline,
gs_out = gs_out =
si_conv_gl_prim_to_gs_out(pipeline->shaders[MESA_SHADER_MESH]->info.ms.output_prim); si_conv_gl_prim_to_gs_out(pipeline->shaders[MESA_SHADER_MESH]->info.ms.output_prim);
} else { } else {
gs_out = si_conv_prim_to_gs_out(pCreateInfo->pInputAssemblyState->topology); gs_out = si_conv_prim_to_gs_out(si_translate_prim(pCreateInfo->pInputAssemblyState->topology));
} }
return gs_out; return gs_out;

27
src/amd/vulkan/radv_private.h
View File

@@ -2758,22 +2758,22 @@ si_conv_gl_prim_to_vertices(enum shader_prim gl_prim)
} }
static inline uint32_t static inline uint32_t
si_conv_prim_to_gs_out(enum VkPrimitiveTopology topology) si_conv_prim_to_gs_out(uint32_t topology)
{ {
switch (topology) { switch (topology) {
case VK_PRIMITIVE_TOPOLOGY_POINT_LIST: case V_008958_DI_PT_POINTLIST:
case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST: case V_008958_DI_PT_PATCH:
return V_028A6C_POINTLIST; return V_028A6C_POINTLIST;
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST: case V_008958_DI_PT_LINELIST:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP: case V_008958_DI_PT_LINESTRIP:
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_LINELIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_LINESTRIP_ADJ:
return V_028A6C_LINESTRIP; return V_028A6C_LINESTRIP;
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST: case V_008958_DI_PT_TRILIST:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP: case V_008958_DI_PT_TRISTRIP:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN: case V_008958_DI_PT_TRIFAN:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: case V_008958_DI_PT_TRILIST_ADJ:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY: case V_008958_DI_PT_TRISTRIP_ADJ:
return V_028A6C_TRISTRIP; return V_028A6C_TRISTRIP;
default: default:
assert(0); assert(0);
@@ -2808,8 +2808,7 @@ si_translate_prim(unsigned topology)
case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST: case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST:
return V_008958_DI_PT_PATCH; return V_008958_DI_PT_PATCH;
default: default:
assert(0); unreachable("unhandled primitive type");
return 0;
} }
} }