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nir: Eliminate nir_op_f2b

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Builds on the work of !15121.  This gets to delete even more code
because many drivers shared a lot of code for i2b and f2b.

No shader-db or fossil-db changes on any Intel platform.

v2: Rebase on 1a35acd8d9.

v3: Update a comment in nir_opcodes_c.py. Suggested by Konstantin.

v4: Another rebase. Remove f2b stuff from Midgard.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20509>
This commit is contained in:
Ian Romanick
2022-02-22 10:22:12 -08:00
committed by Marge Bot
parent 024122c069
commit ea413e826b
30 changed files with 10 additions and 227 deletions
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21
src/intel/compiler/brw_vec4_nir.cpp
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@@ -1555,27 +1555,6 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
}
break;
case nir_op_f2b32:
if (nir_src_bit_size(instr->src[0].src) == 64) {
/* We use a MOV with conditional_mod to check if the provided value is
* 0.0. We want this to flush denormalized numbers to zero, so we set a
* source modifier on the source operand to trigger this, as source
* modifiers don't affect the result of the testing against 0.0.
*/
src_reg value = op[0];
value.abs = true;
vec4_instruction *inst = emit(MOV(dst_null_df(), value));
inst->conditional_mod = BRW_CONDITIONAL_NZ;
src_reg one = src_reg(this, glsl_type::ivec4_type);
emit(MOV(dst_reg(one), brw_imm_d(~0)));
inst = emit(BRW_OPCODE_SEL, dst, one, brw_imm_d(0));
inst->predicate = BRW_PREDICATE_NORMAL;
} else {
emit(CMP(dst, op[0], brw_imm_f(0.0f), BRW_CONDITIONAL_NZ));
}
break;
case nir_op_unpack_half_2x16_split_x:
case nir_op_unpack_half_2x16_split_y:
case nir_op_pack_half_2x16_split: