radv: remove radv_pipeline::layout
From the VK_KHR_maintenance4 spec: "Allow the application to destroy their VkPipelineLayout object immediately after it was used to create another object. It is no longer necessary to keep its handle valid while the created object is in use." Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
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ea281f5f0a
@@ -2810,6 +2810,7 @@ radv_determine_ngg_settings(struct radv_pipeline *pipeline,
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static void
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radv_fill_shader_info(struct radv_pipeline *pipeline,
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struct radv_pipeline_layout *pipeline_layout,
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const VkPipelineShaderStageCreateInfo **pStages,
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const struct radv_pipeline_key *pipeline_key,
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struct radv_shader_info *infos, nir_shader **nir)
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@@ -2885,7 +2886,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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if (nir[MESA_SHADER_FRAGMENT]) {
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radv_nir_shader_info_init(&infos[MESA_SHADER_FRAGMENT]);
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radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout,
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radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline_layout,
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pipeline_key, &infos[MESA_SHADER_FRAGMENT]);
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assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
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@@ -2930,7 +2931,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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infos[MESA_SHADER_TESS_CTRL].vs.as_ls = true;
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for (int i = 0; i < 2; i++) {
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radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, pipeline_key,
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radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline_layout, pipeline_key,
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&infos[MESA_SHADER_TESS_CTRL]);
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}
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@@ -2957,7 +2958,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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infos[MESA_SHADER_GEOMETRY].gs.es_type = pre_stage;
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for (int i = 0; i < 2; i++) {
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radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline->layout, pipeline_key,
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radv_nir_shader_info_pass(pipeline->device, combined_nir[i], pipeline_layout, pipeline_key,
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&infos[MESA_SHADER_GEOMETRY]);
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}
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@@ -2969,7 +2970,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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while (active_stages) {
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int i = u_bit_scan(&active_stages);
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radv_nir_shader_info_init(&infos[i]);
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radv_nir_shader_info_pass(pipeline->device, nir[i], pipeline->layout, pipeline_key, &infos[i]);
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radv_nir_shader_info_pass(pipeline->device, nir[i], pipeline_layout, pipeline_key, &infos[i]);
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}
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if (nir[MESA_SHADER_COMPUTE]) {
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@@ -3348,8 +3349,9 @@ non_uniform_access_callback(const nir_src *src, void *_)
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}
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VkResult
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radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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struct radv_pipeline_cache *cache, const struct radv_pipeline_key *pipeline_key,
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radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout *pipeline_layout,
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struct radv_device *device, struct radv_pipeline_cache *cache,
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const struct radv_pipeline_key *pipeline_key,
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const VkPipelineShaderStageCreateInfo **pStages,
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const VkPipelineCreateFlags flags, const uint8_t *custom_hash,
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VkPipelineCreationFeedbackEXT *pipeline_feedback,
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@@ -3391,7 +3393,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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if (custom_hash)
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memcpy(hash, custom_hash, 20);
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else {
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radv_hash_shaders(hash, pStages, pipeline->layout, pipeline_key,
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radv_hash_shaders(hash, pStages, pipeline_layout, pipeline_key,
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radv_get_hash_flags(device, keep_statistic_info));
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}
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memcpy(gs_copy_hash, hash, 20);
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@@ -3438,7 +3440,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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nir[i] = radv_shader_compile_to_nir(device, modules[i], stage ? stage->pName : "main", i,
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stage ? stage->pSpecializationInfo : NULL,
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pipeline->layout, pipeline_key);
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pipeline_layout, pipeline_key);
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/* We don't want to alter meta shaders IR directly so clone it
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* first.
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@@ -3474,7 +3476,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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gather_tess_info(device, nir, infos, pipeline_key);
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}
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radv_fill_shader_info(pipeline, pStages, pipeline_key, infos, nir);
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radv_fill_shader_info(pipeline, pipeline_layout, pStages, pipeline_key, infos, nir);
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bool pipeline_has_ngg = (nir[MESA_SHADER_VERTEX] && infos[MESA_SHADER_VERTEX].is_ngg) ||
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(nir[MESA_SHADER_TESS_EVAL] && infos[MESA_SHADER_TESS_EVAL].is_ngg);
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@@ -3613,7 +3615,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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if (infos[MESA_SHADER_GEOMETRY].vs.outinfo.export_clip_dists)
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info.vs.outinfo.export_clip_dists = true;
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radv_nir_shader_info_pass(device, nir[MESA_SHADER_GEOMETRY], pipeline->layout, pipeline_key,
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radv_nir_shader_info_pass(device, nir[MESA_SHADER_GEOMETRY], pipeline_layout, pipeline_key,
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&info);
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info.wave_size = 64; /* Wave32 not supported. */
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info.workgroup_size = 64; /* HW VS: separate waves, no workgroups */
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@@ -3645,7 +3647,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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radv_start_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT]);
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pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_variant_compile(
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device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline->layout,
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device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline_layout,
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pipeline_key, infos + MESA_SHADER_FRAGMENT, keep_executable_info,
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keep_statistic_info, &binaries[MESA_SHADER_FRAGMENT]);
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@@ -3660,7 +3662,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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radv_start_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL]);
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pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(
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device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline->layout, pipeline_key,
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device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline_layout, pipeline_key,
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&infos[MESA_SHADER_TESS_CTRL], keep_executable_info, keep_statistic_info,
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&binaries[MESA_SHADER_TESS_CTRL]);
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@@ -3678,7 +3680,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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radv_start_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY]);
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pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(
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device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline->layout, pipeline_key,
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device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline_layout, pipeline_key,
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&infos[MESA_SHADER_GEOMETRY], keep_executable_info,
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keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]);
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@@ -3692,7 +3694,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
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radv_start_feedback(stage_feedbacks[i]);
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pipeline->shaders[i] = radv_shader_variant_compile(
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device, modules[i], &nir[i], 1, pipeline->layout, pipeline_key, infos + i,
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device, modules[i], &nir[i], 1, pipeline_layout, pipeline_key, infos + i,
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keep_executable_info, keep_statistic_info, &binaries[i]);
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radv_stop_feedback(stage_feedbacks[i], false);
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@@ -5491,12 +5493,11 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const struct radv_graphics_pipeline_create_info *extra)
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{
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RADV_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, pCreateInfo->layout);
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VkResult result;
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pipeline->device = device;
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pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout);
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pipeline->graphics.last_vgt_api_stage = MESA_SHADER_NONE;
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assert(pipeline->layout);
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struct radv_blend_state blend = radv_pipeline_init_blend_state(pipeline, pCreateInfo, extra);
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@@ -5521,8 +5522,8 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device,
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struct radv_pipeline_key key =
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radv_generate_graphics_pipeline_key(pipeline, pCreateInfo, &blend);
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result = radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags, NULL,
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pipeline_feedback, stage_feedbacks);
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result = radv_create_shaders(pipeline, pipeline_layout, device, cache, &key, pStages,
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pCreateInfo->flags, NULL, pipeline_feedback, stage_feedbacks);
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if (result != VK_SUCCESS)
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return result;
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@@ -5596,6 +5597,9 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device,
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pipeline->graphics.is_ngg &&
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pipeline->shaders[pipeline->graphics.last_vgt_api_stage]->info.has_ngg_culling;
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pipeline->push_constant_size = pipeline_layout->push_constant_size;
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pipeline->dynamic_offset_count = pipeline_layout->dynamic_offset_count;
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radv_pipeline_generate_pm4(pipeline, pCreateInfo, extra, &blend);
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return result;
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@@ -5754,6 +5758,7 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
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{
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RADV_FROM_HANDLE(radv_device, device, _device);
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RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
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RADV_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, pCreateInfo->layout);
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const VkPipelineShaderStageCreateInfo *pStages[MESA_SHADER_STAGES] = {
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0,
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};
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@@ -5773,10 +5778,8 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
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pipeline->device = device;
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pipeline->graphics.last_vgt_api_stage = MESA_SHADER_NONE;
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pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout);
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pipeline->compute.rt_stack_sizes = rt_stack_sizes;
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pipeline->compute.group_count = rt_group_count;
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assert(pipeline->layout);
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const VkPipelineCreationFeedbackCreateInfoEXT *creation_feedback =
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vk_find_struct_const(pCreateInfo->pNext, PIPELINE_CREATION_FEEDBACK_CREATE_INFO_EXT);
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@@ -5791,8 +5794,8 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
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struct radv_pipeline_key key = radv_generate_compute_pipeline_key(pipeline, pCreateInfo);
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result = radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags,
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custom_hash, pipeline_feedback, stage_feedbacks);
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result = radv_create_shaders(pipeline, pipeline_layout, device, cache, &key, pStages,
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pCreateInfo->flags, custom_hash, pipeline_feedback, stage_feedbacks);
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if (result != VK_SUCCESS) {
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radv_pipeline_destroy(device, pipeline, pAllocator);
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return result;
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@@ -5804,6 +5807,9 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
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radv_shader_need_indirect_descriptor_sets(pipeline, MESA_SHADER_COMPUTE);
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radv_pipeline_init_scratch(device, pipeline);
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pipeline->push_constant_size = pipeline_layout->push_constant_size;
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pipeline->dynamic_offset_count = pipeline_layout->dynamic_offset_count;
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radv_compute_generate_pm4(pipeline);
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*pPipeline = radv_pipeline_to_handle(pipeline);
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